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Tiling with limited resources

Pierre-Yves Callandtex2html_wrap_inline757, Jack Dongarratex2html_wrap_inline759 and Yves Roberttex2html_wrap_inline761

tex2html_wrap_inline757 LIP, Ecole Normale Supérieure de Lyon, 69364 Lyon Cedex 07, France
tex2html_wrap_inline761 Department of Computer Science, University of Tennessee, Knoxville, TN 37996-1301, USA
tex2html_wrap_inline769 Mathematical Sciences Section, Oak Ridge National Laboratory, Oak Ridge, TN 37831, USA
e-mail: [dongarra, yrobert]

February 1997


In the framework of perfect loop nests with uniform dependences, tiling has been extensively studied as a source-to-source program transformation. Little work has been devoted to the mapping and scheduling of the tiles on to physical processors. We present several new results in the context of limited computational resources, and assuming communication-computation overlap. In particular, under some reasonable assumptions, we derive the optimal mapping and scheduling of tiles to physical processors.

Jack Dongarra
Sat Feb 8 08:17:58 EST 1997