References

1

A. Agarwal, D.A. Kranz, and V. Natarajan. Automatic partitioning of parallel loops and data arrays for distributed shared-memory multiprocessors. IEEE Trans. Parallel Distributed Systems, 6(9):943-962, 1995.

2

Utpal Banerjee. An introduction to a formal theory of dependence analysis. The Journal of Supercomputing, 2:133-149, 1988.

3

Pierre Boulet, Alain Darte, Tanguy Risset, and Yves Robert. (Pen)-ultimate tiling? Integration, the VLSI Journal, 17:33-51, 1994.

4

Pierre-Yves Calland and Tanguy Risset. Precise tiling for uniform loop nests. In P. Cappello et al., editors, Application Specific Array Processors ASAP 95, pages 330-337. IEEE Computer Society Press, 1995.

5

Y-S. Chen, S-D. Wang, and C-M. Wang. Tiling nested loops into maximal rectangular blocks. Journal of Parallel and Distributed Computing, 35(2):108-120, 1996.

6

J. Choi, J. Demmel, I. Dhillon, J. Dongarra, S. Ostrouchov, A. Petitet, K. Stanley, D. Walker, and R. C. Whaley. ScaLAPACK: A portable linear algebra library for distributed memory computers - design issues and performance. Computer Physics Communications, 97:1-15, 1996. (also LAPACK Working Note #95).

7

W.H. Chou and S.Y. Kung. Scheduling partitioned algorithms with limited communication supports. In Luigi Dadda and Benjamin Wah, editors, Application Specific Array Processors ASAP 93, pages 53-64. IEEE Computer Society Press, 1993.

8

Ed F. Deprettere. Example of combined algorithm development and architecture design. INTEGRATION, the VLSI journal, 16:199-220, 1993.

9

Ed F. Deprettere, Peter Held, and Paul Wielage. Model and methods for regular array design. International Journal of High Speed Electronics and Systems, 4(2):133-201, 1993.

10

Michèle Dion, Tanguy Risset, and Yves Robert. Resource-constrained scheduling of partitioned algorithms on processor arrays. Integration, the VLSI Journal, 20:139-159, 1996.

11

J. J. Dongarra and D. W. Walker. Software libraries for linear algebra computations on high performance computers. SIAM Review, 37(2):151-180, 1995.

12

Seema Hiranandani, Ken Kennedy, and Chau-Wen Tseng. Evaluating compiler optimizations for Fortran D. Journal of Parallel and Distributed Computing, 21(1):27-45, 1992.

13

F. Irigoin and R. Triolet. Supernode partitioning. In Proc. 15th Annual ACM Symp. Principles of Programming Languages, pages 319-329, San Diego, CA, January 1988.

14

H. Ohta, Y. Saito, M. Kainaga, and H. Ono. Optimal tile size adjustment in compiling general DOACROSS loop nests. In 1995 International Conference on Supercomputing, pages 270-279. ACM Press, 1995.

15

J. K. Peir. Program partitioning and synchronization on multiprocessor systems. PhD thesis, University of Illinois at Urbana-Champaign, March 1986. Report UIUC-DCS-R-86-1259.

16

J. Ramanujam and P. Sadayappan. Tiling multidimensional iteration spaces for multicomputers. Journal of Parallel and Distributed Computing, 16(2):108-120, 1992.

17

R. Schreiber and Jack J. Dongarra. Automatic blocking of nested loops. Technical Report 90-38, The University of Tennessee, Knoxville, TN, August 1990.

18

S. Sharma, C.-H. Huang, and P. Sadayappan. On data dependence analysis for compiling programs on distributed-memory machines. ACM Sigplan Notices, 28(1), January 1993. Extended Abstract.

19

J. Teich, L. Thiele, and L. Zhang. Scheduling of partitioned regular algorithms on processor arrays with constrained resources. In J. Fortes et al., editor, Application-Specific Systems, Architectures, and Processors ASAP 96. IEEE Computer Society Press, 1996.

20

L. Thiele. Resource constrained scheduling of uniform algorithms. In Luigi Dadda and Benjamin Wah, editors, Application Specific Array Processors ASAP 93, pages 29-40. IEEE Computer Society Press, 1993.