The same technique of tiling loop nests can be used in other contexts, for example:
1. The synthesis of systolic arrays. We may design an array large enough to handle a single tile of some given size; the overall computation can be performed by the small systolic array regardless of the size of the data, by tiling the index space and using the array on the individual tiles. This technique was proposed originally by Moldovan and Fortes [15], who did not specify how to choose the hyperplanes; we have filled in that gap.
2. The decomposition of work into tasks that can be executed in parallel on a shared-memory multiprocessor. This technique can find tasks of medium to large granularity that require little communication through shared memory. It is straightforward to prove that, for sufficiently large block sizes, the dependence vectors in the quotient index space are all positive. Thus, we may execute tiles simultaneously if the sum of their tile indices is equal. This approach is currently being pursued by some manufacturers of shared-memory parallel MIMD machines. This paper enhances that technique by allowing for more effective decompositions.