CM-5



next up previous
Next: Intel Paragon Up: Details on the Previous: Test program

CM-5

: We used the CM-5 located at the University of Tennessee. It contains 32 processing nodes. Each of these nodes is a 32 MHz Sparc processor with 32 MBytes of primary memory. The interconnection network is a flat tree, theoretically capable of exchanging data between two nearby nodes at rates up to 20 MBytes/sec.



Jack Dongarra
Thu Jul 20 07:22:58 EDT 1995