next up previous contents
Next: The Silicon Graphics Origin Series. Up: Distributed-memory MIMD systems Previous: The NEC Cenju-3.

The Parsytec CC series.

Machine type RISC-based distributed-memory multi-processor
Models Parsytec CCi, Parsytec CCe, Parsytec Power Mouse
Operating system Unix on host processor, Parix (CC OS, transparent to the user)
Connection structure ..., 2-D grid (on Power Mouse)
Compilers Fortran 77, Fortran 90, ANSI C, C++
Vendors information Web page www.parsytec.com
Year of introduction 1996.

System parameters:

Model CCi CCe Power Mouse
Clock cycle --- 4.4 ns 5 ns
Theor. peak performance
Per proc. (64-bits) --- Mflop/s 450 Mflop/s 400 Mflop/s
Maximum (64-bits) --- Gflop/s --- Gflop/s --- Gflop/s
Main memory
Memory/node --- MB 64 MB 64 MB
Main memory --- GB --- GB --- GB
Communication bandwidth
Point-to-point 10 MB/s 75 MB/s 10 MB/s
No. of processors --- --- ---

Remarks:

The standard technical information as provided by Parsytec via its Web pages is too incomplete for a useful description. It is sufficient to infer that the systems exist and are marketed but not much more. From the CCi models only is made known that they are using Intel processors but no other details are available.

A CCe with 40 processors is located at the University of Amsterdam. In this system a CLOS-network is used to connect the nodes, but it is not sure whether this is a standard configuration. Parsytec also works as a system integrator, so other interconnections/configurations might be possible. The Parsytec CCe series is equipped with ATM HS links. The link speed is up to about 75 MB/s.

The Power Mouse is built from 4-node bricks that communicate over 4 serial links/node at 10 MB/s per link (bi-directional) using T425 transputers. The documentation states the scalability as being unlimited. In view of this discrepancy between the computational speed and the communication speed this might, however, not be of much practical value. A Sun SPARC front-end is required to communicate with the systems. I/O also has be done via the front-end system.

Measured Performances: No independently confirmed performance figures from either system are available at this moment.



next up previous contents
Next: The Silicon Graphics Origin series. Up: Distributed-memory MIMD systems Previous: The NEC Cenju-3.



Aad van der Steen
Mon Feb 16 12:25:47 MET 1998