ftp://ftp.cs.colorado.edu/pub/cs/distribs/Awesime/barriers/ Efficient Barriers for Distributed Shared Memory Computers <author>Dirk Grunwald / grunwald@cs.colorado.edu <author>Suvas Vajracharya / suvas@cs.colorado.edu <abstract> This directory contains implementations of barrier algorithms for the KSR-1, Seequent Symmetry, and BBN-TC2000. Barriers are a synchronization tool for parallel computers, including shared and distributed (messaage-passing) address-space architectures. No processor may pass barrier until all processors have arrived at the barrier; this synchronization tool is used in many algorithms and is central to the data-parallel programming model. On architectures lacking hardware support for barrier synchronization, scalable barriers must be implemented in software, using the underlying communication network. This directory contains the implementation of two new barrier algorithms, Static f-way Tournament and Dynamic f-way. The new barrier algorithms adapt well to a hierarchical caching memory model and take advantage of parallel communication offered by most multiprocessor interconnection networks. <keywords>barrier synchronization; shared memory multiprocessor <category>ppt-pplib </urc>