# bibtab

bibtype: article
filename: fparith.bib
label: Vuillemin:1994:CN
author: J. E. Vuillemin
title: On Circuits and Numbers
journal: j-IEEE-TRANS-COMPUT
volume: 43
number: 8
pages: 868--879
month: aug
monthnumber: 8
year: 1994
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.295849
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Mon May 20 06:16:49 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:16:49 MDT
fjournal: IEEE Transactions on Computers
remark: Selected revised and extended papers from ARITH'11 cite Swartzlander:1993:SCA.
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: J. E. Vuillemin
rawtitle: On Circuits and Numbers
entry:
@Article{Vuillemin:1994:CN,
  author =       "J. E. Vuillemin",
  title =        "On Circuits and Numbers",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "43",
  number =       "8",
  pages =        "868--879",
  month =        aug,
  year =         "1994",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.295849",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Mon May 20 06:16:49 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
  remark =       "Selected revised and extended papers from ARITH'11
                 \cite{Swartzlander:1993:SCA}.",
}


bibtype: article
filename: fparith.bib
label: Walker:1994:SMA
author: W. J. Walker
title: A summability method for the arithmetic Fourier transform
journal: j-BIT
volume: 34
number: 2
pages: 304--309
month: jun
monthnumber: 6
year: 1994
CODEN: BITTEL, NBITAB
DOI: https://doi.org/10.1007/BF01955877
ISSN: 0006-3835 (print), 1572-9125 (electronic) OR 00063835 (print), 15729125 (electronic)
ISSNL: 0006-3835 OR 00063835
MRclass: 42A99 (65T20)
MRnumber: 97i:42010
bibdate: Wed Jan 4 18:52:23 MST 2006
bibtimestamp: 2006.01.04 18:52:23 MST
fjournal: BIT (Nordisk tidskrift for informationsbehandling)
acknowledgement: ack-nhfb
journalURL: http://link.springer.com/journal/10543
rawauthor: W. J. Walker
rawtitle: A summability method for the arithmetic {Fourier} transform
bibsource:
http://springerlink.metapress.com/openurl.asp?genre=issue&issn=0006-3835&volume=34&issue=2; https://www.math.utah.edu/pub/tex/bib/bit.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib

URL:
http://www.mai.liu.se/BIT/contents/bit34.html; http://www.springerlink.com/openurl.asp?genre=article&issn=0006-3835&volume=34&issue=2&spage=304

entry:
@Article{Walker:1994:SMA,
  author =       "W. J. Walker",
  title =        "A summability method for the arithmetic {Fourier}
                 transform",
  journal =      j-BIT,
  volume =       "34",
  number =       "2",
  pages =        "304--309",
  month =        jun,
  year =         "1994",
  CODEN =        "BITTEL, NBITAB",
  DOI =          "https://doi.org/10.1007/BF01955877",
  ISSN =         "0006-3835 (print), 1572-9125 (electronic)",
  ISSN-L =       "0006-3835",
  MRclass =      "42A99 (65T20)",
  MRnumber =     "97i:42010",
  bibdate =      "Wed Jan 4 18:52:23 MST 2006",
  bibsource =    "http://springerlink.metapress.com/openurl.asp?genre=issue&issn=0006-3835&volume=34&issue=2;
                 https://www.math.utah.edu/pub/tex/bib/bit.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.mai.liu.se/BIT/contents/bit34.html;
                 http://www.springerlink.com/openurl.asp?genre=article&issn=0006-3835&volume=34&issue=2&spage=304",
  acknowledgement = ack-nhfb,
  fjournal =     "BIT (Nordisk tidskrift for informationsbehandling)",
  journal-URL =  "http://link.springer.com/journal/10543",
}


bibtype: techreport
filename: fparith.bib
label: Walters:1994:CTR
author: H. R. Walters
title: A Complete Term Rewriting System for Decimal Integer Arithmetic
type: Technical report
number: CS-9435
institution: Centrum voor Wiskunde en Informatica (CWI)
address: Amsterdam, The Netherlands
pages: 9
month: aug
monthnumber: 8
year: 1994
bibdate: Fri Nov 28 19:36:09 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.28 19:36:09 ???
acknowledgement: ack-mfc
rawauthor: H. R. Walters
rawtitle: A Complete Term Rewriting System for Decimal Integer Arithmetic
abstract:
We present a term rewriting system for decimal integers with addition and subtraction. We prove that the system is confluent and terminating.

rawabstract:
We present a term rewriting system for decimal integers with addition and subtraction. We prove that the system is confluent and terminating.

entry:
@TechReport{Walters:1994:CTR,
  author =       "H. R. Walters",
  title =        "A Complete Term Rewriting System for Decimal Integer
                 Arithmetic",
  type =         "Technical report",
  number =       "CS-9435",
  institution =  "Centrum voor Wiskunde en Informatica (CWI)",
  address =      "Amsterdam, The Netherlands",
  pages =        "9",
  month =        aug,
  year =         "1994",
  bibdate =      "Fri Nov 28 19:36:09 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "We present a term rewriting system for decimal
                 integers with addition and subtraction. We prove that
                 the system is confluent and terminating.",
  acknowledgement = ack-mfc # " and " # ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Wang:1994:MQF
title: Multiple Quadratic Forms: a Case Study in the Design of Data-Parallel Algorithms
journal: j-J-PAR-DIST-COMP
volume: 21
number: 1
pages: 124--139
month: apr
monthnumber: 4
year: 1994
CODEN: JPDCER
DOI: https://doi.org/10.1006/jpdc.1994.1046
ISSN: 0743-7315 (print), 1096-0848 (electronic) OR 07437315 (print), 10960848 (electronic)
ISSNL: 0743-7315 OR 07437315
bibdate: Thu Mar 9 09:18:54 MST 2000
bibtimestamp: 2000.03.09 09:18:54 MST
fjournal: Journal of Parallel and Distributed Computing
acknowledgement: ack-nhfb
corpsource: Department of Computer Science, City University of New York, NY, USA
journalURL: http://www.sciencedirect.com/science/journal/07437315
treatment: P Practical
rawtitle: Multiple Quadratic Forms: a Case Study in the Design of Data-Parallel Algorithms
author:
Mu-Cheng Wang and Wayne G. Nation and James B. Armstrong and Howard Jay Siegel and Shin Dug Kim and Mark A. Nichols and Michael Gherrity

URL:
http://www.idealibrary.com/links/doi/10.1006/jpdc.1994.1046/production; http://www.idealibrary.com/links/doi/10.1006/jpdc.1994.1046/production/pdf

keywords:
communication overhead; complex arithmetic operation count; complexity; computational complexity; data-parallel algorithms; MasPar; memory storage; MP-1; multiple quadratic forms; nCUBE 2; parallel algorithms; partitioning; PASM; real-time; systems

rawauthor:
Mu-Cheng Wang and Wayne G. Nation and James B. Armstrong and Howard Jay Siegel and Shin Dug Kim and Mark A. Nichols and Michael Gherrity

entry:
@Article{Wang:1994:MQF,
  author =       "Mu-Cheng Wang and Wayne G. Nation and James B.
                 Armstrong and Howard Jay Siegel and Shin Dug Kim and
                 Mark A. Nichols and Michael Gherrity",
  title =        "Multiple Quadratic Forms: a Case Study in the Design
                 of Data-Parallel Algorithms",
  journal =      j-J-PAR-DIST-COMP,
  volume =       "21",
  number =       "1",
  pages =        "124--139",
  month =        apr,
  year =         "1994",
  CODEN =        "JPDCER",
  DOI =          "https://doi.org/10.1006/jpdc.1994.1046",
  ISSN =         "0743-7315 (print), 1096-0848 (electronic)",
  ISSN-L =       "0743-7315",
  bibdate =      "Thu Mar 9 09:18:54 MST 2000",
  bibsource =    "http://www.idealibrary.com/servlet/useragent?func=showAllIssues&curIssueID=jpdc;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.idealibrary.com/links/doi/10.1006/jpdc.1994.1046/production;
                 http://www.idealibrary.com/links/doi/10.1006/jpdc.1994.1046/production/pdf",
  acknowledgement = ack-nhfb,
  classification = "C4240P (Parallel programming and algorithm theory)",
  corpsource =   "Department of Computer Science, City University of New
                 York, NY, USA",
  fjournal =     "Journal of Parallel and Distributed Computing",
  journal-URL =  "http://www.sciencedirect.com/science/journal/07437315",
  keywords =     "communication overhead; complex arithmetic operation
                 count; complexity; computational complexity;
                 data-parallel algorithms; MasPar; memory storage; MP-1;
                 multiple quadratic forms; nCUBE 2; parallel algorithms;
                 partitioning; PASM; real-time; systems",
  treatment =    "P Practical",
}


bibtype: book
filename: fparith.bib
label: Weaver:1994:SAM
author: David L. Weaver and Tom Germond
title: The SPARC Architecture Manual: Version 9
publisher: pub-PHPTR
address: pub-PHPTR:adr
pages: xxii + 357
year: 1994
ISBN: 0-13-099227-5 OR 0130992275
ISBN13: 978-0-13-099227-7 OR 9780130992277
LCCN: QA76.9.A73S648 1992
bibdate: Fri Jul 22 08:37:56 1994
bibtimestamp: 1994.07.22 08:37:56 ???
URL: http://www.sparc.org/standards/SPARCV9.pdf
acknowledgement: ack-nhfb
rawauthor: David L. Weaver and Tom Germond
rawtitle: The {SPARC} Architecture Manual: Version 9
abstract:
SPARC (Scalable Processor Architecture) is the industry's only openly defined and evolved RISC architecture. Version 9 is the new 64-bit incarnation of SPARC --- the most significant change since SPARC's introduction in 1987! Unlike other RISC (Reduced Instruction Set Computer) designs, SPARC specifies not a hardware implementation (``chip''), but an open, standard architecture belonging to the community of SPARC vendors and users. The SPARC specification is defined by the SPARC Architecture Committee, a technical arm of the computer-maker consortium, SPARC International. Version 9 provides 64-bit data and addressing, support for fault tolerance, fast context switching, support for advanced compiler optimizations, efficient design for Superscalar processors, and a clean structure for modern operating systems. The V9 architecture supplements, rather than replaces, the 32-bit Version 8 architecture. The non-privileged features of Version 9 are upward-compatible from Version 8, so 32-bit application software can execute natively, without modification, on Version 9 systems no special ``compatibility mode'' is required. Publication of the Version 9 architecture marks a three-year development effort by SPARC International member companies from a broad cross-section of disciplines.

TOC:
Introduction Overview Definitions Architectural Overview Data Formats Registers Instructions Traps Memory Models (Normative) Instruction Definitions (Normative) IEEE 754-1985 Requirements for SPARC-V9 (Normative) SPARC-V9 Implementation Dependencies (Normative) Formal Specification of the Memory Models (Informative) Opcode Maps (Informative) SPARC-V9 MMU Requirements (Informative) Suggested Assembly Language Syntax (Informative) Software Considerations (Informative) Extending the SPARC-V9 Architecture (Informative) Programming With the Memory Models (Informative) Changes from SPARC-V8 to SPARC-V9 Bibliography Index

rawabstract:
SPARC (Scalable Processor Architecture) is the industry's only openly defined and evolved RISC architecture. Version 9 is the new 64-bit incarnation of SPARC --- the most significant change since SPARC's introduction in 1987! Unlike other RISC (Reduced Instruction Set Computer) designs, SPARC specifies not a hardware implementation (``chip''), but an open, standard architecture belonging to the community of SPARC vendors and users. The SPARC specification is defined by the SPARC Architecture Committee, a technical arm of the computer-maker consortium, SPARC International. Version 9 provides 64-bit data and addressing, support for fault tolerance, fast context switching, support for advanced compiler optimizations, efficient design for Superscalar processors, and a clean structure for modern operating systems. The V9 architecture supplements, rather than replaces, the 32-bit Version 8 architecture. The non-privileged features of Version 9 are upward-compatible from Version 8, so 32-bit application software can execute natively, without modification, on Version 9 systems no special ``compatibility mode'' is required. Publication of the Version 9 architecture marks a three-year development effort by SPARC International member companies from a broad cross-section of disciplines.

rawTOC:
Introduction \\ Overview \\ Definitions \\ Architectural Overview \\ Data Formats \\ Registers \\ Instructions \\ Traps \\ Memory Models \\ (Normative) Instruction Definitions \\ (Normative) IEEE 754-1985 Requirements for SPARC-V9 \\ (Normative) SPARC-V9 Implementation Dependencies \\ (Normative) Formal Specification of the Memory Models \\ (Informative) Opcode Maps \\ (Informative) SPARC-V9 MMU Requirements \\ (Informative) Suggested Assembly Language Syntax \\ (Informative) Software Considerations \\ (Informative) Extending the SPARC-V9 Architecture \\ (Informative) Programming With the Memory Models \\ (Informative) Changes from SPARC-V8 to SPARC-V9 \\ Bibliography \\ Index

entry:
@Book{Weaver:1994:SAM,
  author =       "David L. Weaver and Tom Germond",
  title =        "The {SPARC} Architecture Manual: Version 9",
  publisher =    pub-PHPTR,
  address =      pub-PHPTR:adr,
  pages =        "xxii + 357",
  year =         "1994",
  ISBN =         "0-13-099227-5",
  ISBN-13 =      "978-0-13-099227-7",
  LCCN =         "QA76.9.A73S648 1992",
  bibdate =      "Fri Jul 22 08:37:56 1994",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/master.bib;
                 https://www.math.utah.edu/pub/tex/bib/microchip.bib",
  price =        "US\$33.00",
  URL =          "http://www.sparc.org/standards/SPARCV9.pdf",
  abstract =     "SPARC (Scalable Processor Architecture) is the
                 industry's only openly defined and evolved RISC
                 architecture. Version 9 is the new 64-bit incarnation
                 of SPARC --- the most significant change since SPARC's
                 introduction in 1987! Unlike other RISC (Reduced
                 Instruction Set Computer) designs, SPARC specifies not
                 a hardware implementation (``chip''), but an open,
                 standard architecture belonging to the community of
                 SPARC vendors and users. The SPARC specification is
                 defined by the SPARC Architecture Committee, a
                 technical arm of the computer-maker consortium, SPARC
                 International. Version 9 provides 64-bit data and
                 addressing, support for fault tolerance, fast context
                 switching, support for advanced compiler optimizations,
                 efficient design for Superscalar processors, and a
                 clean structure for modern operating systems. The V9
                 architecture supplements, rather than replaces, the
                 32-bit Version 8 architecture. The non-privileged
                 features of Version 9 are upward-compatible from
                 Version 8, so 32-bit application software can execute
                 natively, without modification, on Version 9 systems no
                 special ``compatibility mode'' is required. Publication
                 of the Version 9 architecture marks a three-year
                 development effort by SPARC International member
                 companies from a broad cross-section of disciplines.",
  acknowledgement = ack-nhfb,
  tableofcontents = "Introduction \\
                 Overview \\
                 Definitions \\
                 Architectural Overview \\
                 Data Formats \\
                 Registers \\
                 Instructions \\
                 Traps \\
                 Memory Models \\
                 (Normative) Instruction Definitions \\
                 (Normative) IEEE 754-1985 Requirements for SPARC-V9 \\
                 (Normative) SPARC-V9 Implementation Dependencies \\
                 (Normative) Formal Specification of the Memory Models
                 \\
                 (Informative) Opcode Maps \\
                 (Informative) SPARC-V9 MMU Requirements \\
                 (Informative) Suggested Assembly Language Syntax \\
                 (Informative) Software Considerations \\
                 (Informative) Extending the SPARC-V9 Architecture \\
                 (Informative) Programming With the Memory Models \\
                 (Informative) Changes from SPARC-V8 to SPARC-V9 \\
                 Bibliography \\
                 Index",
}


bibtype: inproceedings
filename: fparith.bib
label: Wei:1994:REF
author: D.-Y. D. Wei and J. H. Kim and T. R. N. Rao
booktitle: Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1994
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 74--82
year: 1994
bibdate: Sat Jul 16 11:25:07 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 11:25:07 MDT
keywords: floating-point testing
acknowledgement: ack-nhfb
rawauthor: D.-Y. D. Wei and J. H. Kim and T. R. N. Rao
title:
Roundoff error-free tests in algorithm-based fault tolerant matrix operations on $2$-D processor arrays

rawbooktitle:
Proceedings of the {IEEE} International Workshop on Defect and Fault Tolerance in {VLSI} Systems, 1994

rawtitle:
Roundoff error-free tests in algorithm-based fault tolerant matrix operations on {$2$-D} processor arrays

entry:
@InProceedings{Wei:1994:REF,
  author =       "D.-Y. D. Wei and J. H. Kim and T. R. N. Rao",
  booktitle =    "Proceedings of the {IEEE} International Workshop on
                 Defect and Fault Tolerance in {VLSI} Systems, 1994",
  title =        "Roundoff error-free tests in algorithm-based fault
                 tolerant matrix operations on {$2$-D} processor
                 arrays",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "74--82",
  year =         "1994",
  CODEN =        "????",
  ISSN =         "????",
  bibdate =      "Sat Jul 16 11:25:07 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "floating-point testing",
  summary =      "Assaad and Dutt [1992] proposed the hybrid checksum
                 test method for the floating-point matrix-matrix
                 multiplication in ABFT environment, by which the error
                 coverage can be greatly increased. However, the
                 threshold test in their approach is still \ldots{}",
}


bibtype: book
filename: fparith.bib
label: Weiss:1994:PPP
author: Shlomo Weiss and James E. Smith
title: Power and PowerPC: Principles, Architecture, Implementation
publisher: pub-MORGAN-KAUFMANN
address: pub-MORGAN-KAUFMANN:adr
pages: xvi + 408
year: 1994
ISBN: 1-55860-279-8 OR 1558602798
ISBN13: 978-1-55860-279-3 OR 9781558602793
LCCN: QA76.8.P67 W45 1994
bibdate: Wed Aug 10 10:06:55 1994
bibtimestamp: 1994.08.10 10:06:55 ???
acknowledgement: ack-nhfb
rawauthor: Shlomo Weiss and James E. Smith
rawtitle: {Power} and {PowerPC}: Principles, Architecture, Implementation
TOC:
Foreword by Michael Slater Preface Modern Computer Design Concepts / 1 POWER Architecture / 31 POWER Implementation: Pipelines / 71 POWER1 Implementation / 97 POWER1 Implementation: Cache Memories / 115 POWER2: The Next Generation / 135 PowerPC Architecture / 173 PowerPC 601 Implementation / 223 PowerPC: Support for Multiprocessing / 253 System Organization / 271 PowerPC 601 and Alpha 21064 / 305 App. A. IEEE 754 Floating-Point Standard / 333 App. B. POWER Instruction Formats / 341 App. C. POWER Instruction Set Sorted by Mnemonic / 349 App. D. PowerPC Instruction Formats / 355 App. E. PowerPC Instruction Set Sorted by Mnemonic / 365 App. F. Cross Reference for Changed POWER Mnemonics / 377 Bibliography / 383 Index / 391

rawTOC:
Foreword by Michael Slater \\ Preface \\ Modern Computer Design Concepts / 1 \\ POWER Architecture / 31 \\ POWER Implementation: Pipelines / 71 \\ POWER1 Implementation / 97 \\ POWER1 Implementation: Cache Memories / 115 \\ POWER2: The Next Generation / 135 \\ PowerPC Architecture / 173 \\ PowerPC 601 Implementation / 223 \\ PowerPC: Support for Multiprocessing / 253 \\ System Organization / 271 \\ PowerPC 601 and Alpha 21064 / 305 \\ App. A. IEEE 754 Floating-Point Standard / 333 \\ App. B. POWER Instruction Formats / 341 \\ App. C. POWER Instruction Set Sorted by Mnemonic / 349 \\ App. D. PowerPC Instruction Formats / 355 \\ App. E. PowerPC Instruction Set Sorted by Mnemonic / 365 \\ App. F. Cross Reference for Changed POWER Mnemonics / 377 \\ Bibliography / 383 \\ Index / 391

entry:
@Book{Weiss:1994:PPP,
  author =       "Shlomo Weiss and James E. Smith",
  title =        "{Power} and {PowerPC}: Principles, Architecture,
                 Implementation",
  publisher =    pub-MORGAN-KAUFMANN,
  address =      pub-MORGAN-KAUFMANN:adr,
  pages =        "xvi + 408",
  year =         "1994",
  ISBN =         "1-55860-279-8",
  ISBN-13 =      "978-1-55860-279-3",
  LCCN =         "QA76.8.P67 W45 1994",
  bibdate =      "Wed Aug 10 10:06:55 1994",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/master.bib;
                 https://www.math.utah.edu/pub/tex/bib/microchip.bib",
  price =        "US\$54.95",
  acknowledgement = ack-nhfb,
  tableofcontents = "Foreword by Michael Slater \\
                 Preface \\
                 Modern Computer Design Concepts / 1 \\
                 POWER Architecture / 31 \\
                 POWER Implementation: Pipelines / 71 \\
                 POWER1 Implementation / 97 \\
                 POWER1 Implementation: Cache Memories / 115 \\
                 POWER2: The Next Generation / 135 \\
                 PowerPC Architecture / 173 \\
                 PowerPC 601 Implementation / 223 \\
                 PowerPC: Support for Multiprocessing / 253 \\
                 System Organization / 271 \\
                 PowerPC 601 and Alpha 21064 / 305 \\
                 App. A. IEEE 754 Floating-Point Standard / 333 \\
                 App. B. POWER Instruction Formats / 341 \\
                 App. C. POWER Instruction Set Sorted by Mnemonic / 349
                 \\
                 App. D. PowerPC Instruction Formats / 355 \\
                 App. E. PowerPC Instruction Set Sorted by Mnemonic /
                 365 \\
                 App. F. Cross Reference for Changed POWER Mnemonics /
                 377 \\
                 Bibliography / 383 \\
                 Index / 391",
}


bibtype: article
filename: fparith.bib
label: White:1994:PNG
author: S. W. White and S. Dhawan
title: POWER2: Next generation of the RISC System / 6000 family
journal: j-IBM-JRD
volume: 38
number: 5
pages: 493--502
month: sep
monthnumber: 9
year: 1994
CODEN: IBMJAE
ISSN: 0018-8646 (print), 2151-8556 (electronic) OR 00188646 (print), 21518556 (electronic)
ISSNL: 0018-8646 OR 00188646
bibdate: Tue Mar 25 14:26:59 MST 1997
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1997.03.25 14:26:59 MST
URL: http://www.almaden.ibm.com/journal/rd38-5.html#two
fjournal: IBM Journal of Research and Development
acknowledgement: ack-nhfb
affiliation: IBM Corp., Austin, TX, USA
corpsource: IBM Corp., Austin, TX, USA
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=5288520
treatment: P Practical
rawauthor: S. W. White and S. Dhawan
rawtitle: {POWER2}: {Next} generation of the {RISC System\slash 6000} family
abstract:
Since its announcement, the IBM RISC System / 6000* processor has characterized the aggressive instruction-level parallelism approach to achieving performance. Recent enhancements to the architecture and implementation provide greater superscalar capability. This paper describes the architectural extensions which improve storage reference bandwidth, allow hardware square-root computation, and speed floating-point-to-integer conversion. The implementation, which exploits these extensions and doubles the number of functional units, is also described. A comparison of performance results on a variety of industry standard benchmarks demonstrates that superscalar capabilities are an attractive alternative to aggressive clock rates.

keywords:
bandwidth; evaluation; floating-point-to-; Floating-point-to-integer conversion; Floating-point-to-integer conversion, POWER2; IBM RISC System/6000 processor; IBM RISC System / 6000 processor; instruction-level; Instruction-level parallelism; integer conversion; microprocessor chips; parallel architectures; parallelism; performance; POWER2; reduced instruction set computing; Square-root computation; square-root computation; storage reference; Storage reference bandwidth; superscalar capability; Superscalar capability

classcodes:
B1265F (Microprocessors and microcomputers); C5130 (Microprocessor chips); C5220P (Parallel architecture); C5470 (Performance evaluation and testing)

thesaurus:
Microprocessor chips; Parallel architectures; Performance evaluation; Reduced instruction set computing

rawabstract:
Since its announcement, the IBM RISC System\slash 6000* processor has characterized the aggressive instruction-level parallelism approach to achieving performance. Recent enhancements to the architecture and implementation provide greater superscalar capability. This paper describes the architectural extensions which improve storage reference bandwidth, allow hardware square-root computation, and speed floating-point-to-integer conversion. The implementation, which exploits these extensions and doubles the number of functional units, is also described. A comparison of performance results on a variety of industry standard benchmarks demonstrates that superscalar capabilities are an attractive alternative to aggressive clock rates.

entry:
@Article{White:1994:PNG,
  author =       "S. W. White and S. Dhawan",
  title =        "{POWER2}: {Next} generation of the {RISC System\slash
                 6000} family",
  journal =      j-IBM-JRD,
  volume =       "38",
  number =       "5",
  pages =        "493--502",
  month =        sep,
  year =         "1994",
  CODEN =        "IBMJAE",
  ISSN =         "0018-8646 (print), 2151-8556 (electronic)",
  ISSN-L =       "0018-8646",
  bibdate =      "Tue Mar 25 14:26:59 MST 1997",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.almaden.ibm.com/journal/rd38-5.html#two",
  abstract =     "Since its announcement, the IBM RISC System\slash
                 6000* processor has characterized the aggressive
                 instruction-level parallelism approach to achieving
                 performance. Recent enhancements to the architecture
                 and implementation provide greater superscalar
                 capability. This paper describes the architectural
                 extensions which improve storage reference bandwidth,
                 allow hardware square-root computation, and speed
                 floating-point-to-integer conversion. The
                 implementation, which exploits these extensions and
                 doubles the number of functional units, is also
                 described. A comparison of performance results on a
                 variety of industry standard benchmarks demonstrates
                 that superscalar capabilities are an attractive
                 alternative to aggressive clock rates.",
  acknowledgement = ack-nhfb,
  affiliation =  "IBM Corp., Austin, TX, USA",
  classcodes =   "B1265F (Microprocessors and microcomputers); C5130
                 (Microprocessor chips); C5220P (Parallel architecture);
                 C5470 (Performance evaluation and testing)",
  classification = "B1265F (Microprocessors and microcomputers); C5130
                 (Microprocessor chips); C5220P (Parallel architecture);
                 C5470 (Performance evaluation and testing)",
  corpsource =   "IBM Corp., Austin, TX, USA",
  fjournal =     "IBM Journal of Research and Development",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=5288520",
  keywords =     "bandwidth; evaluation; floating-point-to-;
                 Floating-point-to-integer conversion;
                 Floating-point-to-integer conversion, POWER2; IBM RISC
                 System/6000 processor; IBM RISC System\slash 6000
                 processor; instruction-level; Instruction-level
                 parallelism; integer conversion; microprocessor chips;
                 parallel architectures; parallelism; performance;
                 POWER2; reduced instruction set computing; Square-root
                 computation; square-root computation; storage
                 reference; Storage reference bandwidth; superscalar
                 capability; Superscalar capability",
  thesaurus =    "Microprocessor chips; Parallel architectures;
                 Performance evaluation; Reduced instruction set
                 computing",
  treatment =    "P Practical",
}


bibtype: article
filename: fparith.bib
label: Wichmann:1994:CSP
author: B. A. Wichmann
title: Contribution of standard programming languages to software quality
journal: j-SEJ
volume: 9
number: 1
pages: 3--12
month: jan
monthnumber: 1
year: 1994
CODEN: SEJOED
ISSN: 0268-6961 OR 02686961
bibdate: Sun Mar 15 17:49:58 2009
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2009.03.15 17:49:58 ???
fjournal: Software Engineering Journal
remark: Brief mention of floating-point issues in software validation.
acknowledgement: ack-nhfb
rawauthor: B. A. Wichmann
rawtitle: Contribution of standard programming languages to software quality
entry:
@Article{Wichmann:1994:CSP,
  author =       "B. A. Wichmann",
  title =        "Contribution of standard programming languages to
                 software quality",
  journal =      j-SEJ,
  volume =       "9",
  number =       "1",
  pages =        "3--12",
  month =        jan,
  year =         "1994",
  CODEN =        "SEJOED",
  ISSN =         "0268-6961",
  bibdate =      "Sun Mar 15 17:49:58 2009",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "Software Engineering Journal",
  remark =       "Brief mention of floating-point issues in software
                 validation.",
}


bibtype: misc
filename: fparith.bib
label: Williams:1994:MAM
author: T. Williams
pages: 3--12
day: 13
month: sep
monthnumber: 9
year: 1994
bibdate: Fri Nov 28 15:24:41 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.28 15:24:41 ???
note: U.S. Patent No. 5,347,481.
acknowledgement: ack-nhfb
rawauthor: T. Williams
rawnote: U.S. Patent No. 5,347,481.
title:
Method and apparatus for multiplying denormalized binary floating point numbers without additional delay

rawtitle:
Method and apparatus for multiplying denormalized binary floating point numbers without additional delay

entry:
@Misc{Williams:1994:MAM,
  author =       "T. Williams",
  title =        "Method and apparatus for multiplying denormalized
                 binary floating point numbers without additional
                 delay",
  day =          "13",
  month =        sep,
  year =         "1994",
  bibdate =      "Fri Nov 28 15:24:41 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "U.S. Patent No. 5,347,481.",
  acknowledgement = ack-nhfb,
}


bibtype: inproceedings
filename: fparith.bib
label: Wong:1994:FEE
author: W. F. Wong and E. Goto
title: Fast evaluation of the elementary functions in double precision
crossref: Mudge:1994:PTS
pages: 349--358
year: 1994
bibdate: Tue Dec 12 09:29:07 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.12 09:29:07 MST
acknowledgement: ack-nhfb
affiliation: Department of Inf. Syst. and Computer Science, Nat. University of Singapore, Singapore
thesaurus: Digital arithmetic; Polynomials; Table lookup
rawauthor: W. F. Wong and E. Goto
rawtitle: Fast evaluation of the elementary functions in double precision
abstract:
One of the most spectacular development in computer technology is the growth in memory density and speed. It is with this development in mind that we intend to tackle the old problem of computing the elementary functions. Since the dawn of computing, the fast and accurate computation of the elementary functions has been a constant concern of numerical computing. It now seems possible to use tables of sizes in the range of megabits to aid in such computation. To this end, in this paper, we propose a method called ATA-M (Add-Table Lookup-Add with Multiplication) for evaluating polynomials with the aid of tables. When applied to the elementary functions, we obtained a set of algorithms which computes the reciprocal, square root, exponential, sine, cosine, logarithm, are tangent and the hyperbolic functions in about 3 to 4 double precision floating point multiplication time and utilizing about 2 Mbyte of tables.

keywords:
Add-Table Lookup-Add with Multiplication; ATA-M; Double precision; Elementary functions; Floating point multiplication time; Hyperbolic functions; Memory density; Memory speed; Numerical computing; Polynomials

rawabstract:
One of the most spectacular development in computer technology is the growth in memory density and speed. It is with this development in mind that we intend to tackle the old problem of computing the elementary functions. Since the dawn of computing, the fast and accurate computation of the elementary functions has been a constant concern of numerical computing. It now seems possible to use tables of sizes in the range of megabits to aid in such computation. To this end, in this paper, we propose a method called ATA-M (Add-Table Lookup-Add with Multiplication) for evaluating polynomials with the aid of tables. When applied to the elementary functions, we obtained a set of algorithms which computes the reciprocal, square root, exponential, sine, cosine, logarithm, are tangent and the hyperbolic functions in about 3 to 4 double precision floating point multiplication time and utilizing about 2 Mbyte of tables.

entry:
@InProceedings{Wong:1994:FEE,
  author =       "W. F. Wong and E. Goto",
  title =        "Fast evaluation of the elementary functions in double
                 precision",
  crossref =     "Mudge:1994:PTS",
  pages =        "349--358",
  year =         "1994",
  bibdate =      "Tue Dec 12 09:29:07 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "One of the most spectacular development in computer
                 technology is the growth in memory density and speed.
                 It is with this development in mind that we intend to
                 tackle the old problem of computing the elementary
                 functions. Since the dawn of computing, the fast and
                 accurate computation of the elementary functions has
                 been a constant concern of numerical computing. It now
                 seems possible to use tables of sizes in the range of
                 megabits to aid in such computation. To this end, in
                 this paper, we propose a method called ATA-M (Add-Table
                 Lookup-Add with Multiplication) for evaluating
                 polynomials with the aid of tables. When applied to the
                 elementary functions, we obtained a set of algorithms
                 which computes the reciprocal, square root,
                 exponential, sine, cosine, logarithm, are tangent and
                 the hyperbolic functions in about 3 to 4 double
                 precision floating point multiplication time and
                 utilizing about 2 Mbyte of tables.",
  acknowledgement = ack-nhfb,
  affiliation =  "Department of Inf. Syst. and Computer Science, Nat.
                 University of Singapore, Singapore",
  classification = "C4130 (Interpolation and function approximation);
                 C5230 (Digital arithmetic methods)",
  keywords =     "Add-Table Lookup-Add with Multiplication; ATA-M;
                 Double precision; Elementary functions; Floating point
                 multiplication time; Hyperbolic functions; Memory
                 density; Memory speed; Numerical computing;
                 Polynomials",
  thesaurus =    "Digital arithmetic; Polynomials; Table lookup",
}


bibtype: article
filename: fparith.bib
label: Wong:1994:FHB
author: W. F. Wong and E. Goto
title: Fast Hardware-Based Algorithms for Elementary Function Computations Using Rectangular Multipliers
journal: j-IEEE-TRANS-COMPUT
volume: 43
number: 3
pages: 278--294
month: mar
monthnumber: 3
year: 1994
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.272429
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Thu Jul 7 07:13:54 MDT 2011
bibtimestamp: 2011.07.07 07:13:54 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=272429
fjournal: IEEE Transactions on Computers
language: English
acknowledgement: ack-nj
affiliation: Department of Inf. Syst. and Computer Science, Nat. University of Singapore, Singapore
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
thesaurus: Digital arithmetic; Error analysis
rawauthor: W. F. Wong and E. Goto
rawtitle: Fast Hardware-Based Algorithms for Elementary Function Computations Using Rectangular Multipliers
bibsource:
ftp://garbo.uwasa.fi/pc/doc-soft/fpbibl18.zip; https://www.math.utah.edu/pub/tex/bib/elefunt.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib

abstract:
As the name suggests, elementary functions play a vital role in scientific computations. Yet due to their inherent nature, they are a considerable computing task by themselves. Not surprisingly, since the dawn of computing, the goal of speeding up elementary function computation has been pursued. This paper describes new hardware based algorithms for the computation of the common elementary functions, namely division, logarithm, reciprocal square root, arc tangent, sine and cosine. These algorithms exploit microscopic parallelism using specialized hardware with heavy use of truncation based on detailed accuracy analysis. The contribution of this work lies in the fact that these algorithms are very fast and yet are accurate. If we let the time to perform an IEEE Standard 754 double precision floating point multiplication be $ tau _times $, our algorithms to achieve roughly $ 3.68 tau _times $, $ 4.56 tau _times $, $ 5.25 tau _times $, $ 3.69 tau _times $, $ 7.06 tau _times $, and $ 6.5 tau _times $, for division, logarithm, square root, exponential, are tangent and complex exponential (sine and cosine) respectively. The trade-off is the need for tables and some specialized hardware. The total amount of tables required, however, is less than 128 Kbytes. We discuss the hardware, algorithmic and accuracy aspects of these algorithms.

keywords:
Arc tangent; Common elementary functions; Cosine; Elementary function computations; Floating point multiplication; Hardware-based algorithms; Microscopic parallelism; Reciprocal square root; Rectangular multipliers; Scientific computations; Sine

rawabstract:
As the name suggests, elementary functions play a vital role in scientific computations. Yet due to their inherent nature, they are a considerable computing task by themselves. Not surprisingly, since the dawn of computing, the goal of speeding up elementary function computation has been pursued. This paper describes new hardware based algorithms for the computation of the common elementary functions, namely division, logarithm, reciprocal square root, arc tangent, sine and cosine. These algorithms exploit microscopic parallelism using specialized hardware with heavy use of truncation based on detailed accuracy analysis. The contribution of this work lies in the fact that these algorithms are very fast and yet are accurate. If we let the time to perform an IEEE Standard 754 double precision floating point multiplication be $ \tau_\times $, our algorithms to achieve roughly $ 3.68 \tau_\times $, $ 4.56 \tau_\times $, $ 5.25 \tau_\times $, $ 3.69 \tau_\times $, $ 7.06 \tau_\times $, and $ 6.5 \tau_\times $, for division, logarithm, square root, exponential, are tangent and complex exponential (sine and cosine) respectively. The trade-off is the need for tables and some specialized hardware. The total amount of tables required, however, is less than 128 Kbytes. We discuss the hardware, algorithmic and accuracy aspects of these algorithms.

entry:
@Article{Wong:1994:FHB,
  author =       "W. F. Wong and E. Goto",
  title =        "Fast Hardware-Based Algorithms for Elementary Function
                 Computations Using Rectangular Multipliers",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "43",
  number =       "3",
  pages =        "278--294",
  month =        mar,
  year =         "1994",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.272429",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Thu Jul 7 07:13:54 MDT 2011",
  bibsource =    "ftp://garbo.uwasa.fi/pc/doc-soft/fpbibl18.zip;
                 https://www.math.utah.edu/pub/tex/bib/elefunt.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=272429",
  abstract =     "As the name suggests, elementary functions play a
                 vital role in scientific computations. Yet due to their
                 inherent nature, they are a considerable computing task
                 by themselves. Not surprisingly, since the dawn of
                 computing, the goal of speeding up elementary function
                 computation has been pursued. This paper describes new
                 hardware based algorithms for the computation of the
                 common elementary functions, namely division,
                 logarithm, reciprocal square root, arc tangent, sine
                 and cosine. These algorithms exploit microscopic
                 parallelism using specialized hardware with heavy use
                 of truncation based on detailed accuracy analysis. The
                 contribution of this work lies in the fact that these
                 algorithms are very fast and yet are accurate. If we
                 let the time to perform an IEEE Standard 754 double
                 precision floating point multiplication be $
                 \tau_\times $, our algorithms to achieve roughly $ 3.68
                 \tau_\times $, $ 4.56 \tau_\times $, $ 5.25 \tau_\times
                 $, $ 3.69 \tau_\times $, $ 7.06 \tau_\times $, and $
                 6.5 \tau_\times $, for division, logarithm, square
                 root, exponential, are tangent and complex exponential
                 (sine and cosine) respectively. The trade-off is the
                 need for tables and some specialized hardware. The
                 total amount of tables required, however, is less than
                 128 Kbytes. We discuss the hardware, algorithmic and
                 accuracy aspects of these algorithms.",
  acknowledgement = ack-nj # " and " # ack-nhfb,
  affiliation =  "Department of Inf. Syst. and Computer Science, Nat.
                 University of Singapore, Singapore",
  ajournal =     "IEEE Trans. Comput.",
  classification = "C4110 (Error analysis in numerical methods); C5230
                 (Digital arithmetic methods)",
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
  keywords =     "Arc tangent; Common elementary functions; Cosine;
                 Elementary function computations; Floating point
                 multiplication; Hardware-based algorithms; Microscopic
                 parallelism; Reciprocal square root; Rectangular
                 multipliers; Scientific computations; Sine",
  language =     "English",
  pubcountry =   "USA",
  thesaurus =    "Digital arithmetic; Error analysis",
}


bibtype: article
filename: fparith.bib
label: Yang:1994:NIPa
author: Ming-Chwen Yang and Ja-Ling Wu
title: A new interpretation of ``polynomial residue number system''
journal: j-IEEE-TRANS-SIG-PROC
volume: 42
number: 8
pages: 2190--2191
month: aug
monthnumber: 8
year: 1994
CODEN: ITPRED
DOI: https://doi.org/10.1109/78.301857
ISSN: 1053-587X (print), 1941-0476 (electronic) OR 1053587X (print), 19410476 (electronic)
ISSNL: 1053-587X OR 1053587X
bibdate: Fri Nov 9 11:38:58 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:58 MST
URL: http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=7453
fjournal: IEEE Transactions on Signal Processing
keywords: residue arithmetic; residue number system
acknowledgement: ack-nhfb
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=78
rawauthor: Ming-Chwen Yang and Ja-Ling Wu
rawtitle: A new interpretation of ``polynomial residue number system''
entry:
@Article{Yang:1994:NIPa,
  author =       "Ming-Chwen Yang and Ja-Ling Wu",
  title =        "A new interpretation of ``polynomial residue number
                 system''",
  journal =      j-IEEE-TRANS-SIG-PROC,
  volume =       "42",
  number =       "8",
  pages =        "2190--2191",
  month =        aug,
  year =         "1994",
  CODEN =        "ITPRED",
  DOI =          "https://doi.org/10.1109/78.301857",
  ISSN =         "1053-587X (print), 1941-0476 (electronic)",
  ISSN-L =       "1053-587X",
  bibdate =      "Fri Nov 9 11:38:58 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=7453",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Signal Processing",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=78",
  keywords =     "residue arithmetic; residue number system",
  summary =      "The authors show that the polynomial residue number
                 system can be interpreted in terms of the Chinese
                 remainder theorem for polynomials (CRTP) over a finite
                 ring which is useful for signal \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Yang:1994:NIPb
author: Ming-Chwen Yang and Ja-Ling Wu
title: A new interpretation of ``polynomial residue number system''
journal: j-IEEE-TRANS-SIG-PROC
volume: 42
number: 8
pages: 2190--2191
month: aug
monthnumber: 8
year: 1994
CODEN: ITPRED
DOI: https://doi.org/10.1109/78.301857
ISSN: 1053-587X (print), 1941-0476 (electronic) OR 1053587X (print), 19410476 (electronic)
ISSNL: 1053-587X OR 1053587X
bibdate: Fri Nov 9 11:38:58 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:58 MST
URL: http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=7453
fjournal: IEEE Transactions on Signal Processing
keywords: residue arithmetic; residue number system
acknowledgement: ack-nhfb
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=78
rawauthor: Ming-Chwen Yang and Ja-Ling Wu
rawtitle: A new interpretation of ``polynomial residue number system''
entry:
@Article{Yang:1994:NIPb,
  author =       "Ming-Chwen Yang and Ja-Ling Wu",
  title =        "A new interpretation of ``polynomial residue number
                 system''",
  journal =      j-IEEE-TRANS-SIG-PROC,
  volume =       "42",
  number =       "8",
  pages =        "2190--2191",
  month =        aug,
  year =         "1994",
  CODEN =        "ITPRED",
  DOI =          "https://doi.org/10.1109/78.301857",
  ISSN =         "1053-587X (print), 1941-0476 (electronic)",
  ISSN-L =       "1053-587X",
  bibdate =      "Fri Nov 9 11:38:58 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=7453",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Signal Processing",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=78",
  keywords =     "residue arithmetic; residue number system",
  summary =      "The authors show that the polynomial residue number
                 system can be interpreted in terms of the Chinese
                 remainder theorem for polynomials (CRTP) over a finite
                 ring which is useful for signal \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Yuen:1994:PMC
author: C. K. Yuen and M. D. Feng
title: Parallel multiplication: a case study in parallel programming
journal: j-SIGPLAN
volume: 29
number: 3
pages: 12--17
month: mar
monthnumber: 3
year: 1994
CODEN: SINODQ
ISSN: 0362-1340 (print), 1523-2867 (print), 1558-1160 OR 03621340 (print), 15232867 (print), 15581160
ISSNL: 0362-1340 OR 03621340
bibdate: Sun Dec 14 09:16:48 MST 2003
bibsource: http://portal.acm.org/; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.12.14 09:16:48 MST
fjournal: ACM SIGPLAN Notices
acknowledgement: ack-nhfb
corpsource: Department of Inf. Syst. and Computer Science, Nat. University of Singapore, Singapore
journalURL: http://portal.acm.org/browse_dl.cfm?idx=J706
treatment: P Practical
rawauthor: C. K. Yuen and M. D. Feng
rawtitle: Parallel multiplication: a case study in parallel programming
keywords:
AND/OR parallel problems; bottom up design method; mathematics computing; parallel multiplication; parallel program; parallel programming; performance evaluation; program structure design; speculative processing; systems analysis; top down design method; tuplespace

entry:
@Article{Yuen:1994:PMC,
  author =       "C. K. Yuen and M. D. Feng",
  title =        "Parallel multiplication: a case study in parallel
                 programming",
  journal =      j-SIGPLAN,
  volume =       "29",
  number =       "3",
  pages =        "12--17",
  month =        mar,
  year =         "1994",
  CODEN =        "SINODQ",
  ISSN =         "0362-1340 (print), 1523-2867 (print), 1558-1160
                 (electronic)",
  ISSN-L =       "0362-1340",
  bibdate =      "Sun Dec 14 09:16:48 MST 2003",
  bibsource =    "http://portal.acm.org/;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  classification = "C6110P (Parallel programming); C7310 (Mathematics)",
  corpsource =   "Department of Inf. Syst. and Computer Science, Nat.
                 University of Singapore, Singapore",
  fjournal =     "ACM SIGPLAN Notices",
  journal-URL =  "http://portal.acm.org/browse_dl.cfm?idx=J706",
  keywords =     "AND/OR parallel problems; bottom up design method;
                 mathematics computing; parallel multiplication;
                 parallel program; parallel programming; performance
                 evaluation; program structure design; speculative
                 processing; systems analysis; top down design method;
                 tuplespace",
  treatment =    "P Practical",
}


bibtype: inproceedings
filename: fparith.bib
label: Zhang:1994:EMR
author: Qihong Zhang and J. H. Kim
crossref: Lea:1994:PSA
pages: 32--39
year: 1994
bibdate: Tue Dec 12 09:29:07 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.12 09:29:07 MST
acknowledgement: ack-nhfb
affiliation: Center for Adv. Comput. Studies, Southwestern Louisiana University, Lafayette, LA, USA
rawauthor: Qihong Zhang and J. H. Kim
title:
An efficient method to reduce roundoff error in matrix multiplication with algorithm-based fault tolerance

abstract:
Algorithm-Based Fault Tolerance (ABFT) schemes have been proposed by a number of researchers recently. Although all errors can be theoretically detected and corrected by using these techniques, some practical problems, especially the roundoff errors, degrade the performance drastically. In this paper, we proposed a new scheme called Extended Mantissa Checksum (EMC) test in which the mantissa of the product of two input matrices are divided into two sections and extended for faulty detection and correction. Using this scheme, the number of undetected errors and false alarms are decreased largely and the error coverage is improved significantly. In addition, the time latency is short and the hardware overhead is small compared with other schemes.

keywords:
Algorithm-based fault tolerance; correct rounding; Error coverage; Extended mantissa checksum test; False alarms; Fault correction; Fault detection; Floating point test; Hardware overhead; Matrix multiplication; Roundoff error; Time latency

thesaurus:
Algorithm theory; Digital arithmetic; Error correction; Error detection; Fault tolerant computing; Matrix algebra; Roundoff errors

rawabstract:
Algorithm-Based Fault Tolerance (ABFT) schemes have been proposed by a number of researchers recently. Although all errors can be theoretically detected and corrected by using these techniques, some practical problems, especially the roundoff errors, degrade the performance drastically. In this paper, we proposed a new scheme called Extended Mantissa Checksum (EMC) test in which the mantissa of the product of two input matrices are divided into two sections and extended for faulty detection and correction. Using this scheme, the number of undetected errors and false alarms are decreased largely and the error coverage is improved significantly. In addition, the time latency is short and the hardware overhead is small compared with other schemes.

rawtitle:
An efficient method to reduce roundoff error in matrix multiplication with algorithm-based fault tolerance

entry:
@InProceedings{Zhang:1994:EMR,
  author =       "Qihong Zhang and J. H. Kim",
  title =        "An efficient method to reduce roundoff error in matrix
                 multiplication with algorithm-based fault tolerance",
  crossref =     "Lea:1994:PSA",
  pages =        "32--39",
  year =         "1994",
  bibdate =      "Tue Dec 12 09:29:07 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "Algorithm-Based Fault Tolerance (ABFT) schemes have
                 been proposed by a number of researchers recently.
                 Although all errors can be theoretically detected and
                 corrected by using these techniques, some practical
                 problems, especially the roundoff errors, degrade the
                 performance drastically. In this paper, we proposed a
                 new scheme called Extended Mantissa Checksum (EMC) test
                 in which the mantissa of the product of two input
                 matrices are divided into two sections and extended for
                 faulty detection and correction. Using this scheme, the
                 number of undetected errors and false alarms are
                 decreased largely and the error coverage is improved
                 significantly. In addition, the time latency is short
                 and the hardware overhead is small compared with other
                 schemes.",
  acknowledgement = ack-nhfb,
  affiliation =  "Center for Adv. Comput. Studies, Southwestern
                 Louisiana University, Lafayette, LA, USA",
  classification = "C1110 (Algebra); C4240P (Parallel programming and
                 algorithm theory); C5230 (Digital arithmetic methods)",
  keywords =     "Algorithm-based fault tolerance; correct rounding;
                 Error coverage; Extended mantissa checksum test; False
                 alarms; Fault correction; Fault detection; Floating
                 point test; Hardware overhead; Matrix multiplication;
                 Roundoff error; Time latency",
  thesaurus =    "Algorithm theory; Digital arithmetic; Error
                 correction; Error detection; Fault tolerant computing;
                 Matrix algebra; Roundoff errors",
}


bibtype: article
filename: fparith.bib
label: Zhang:1994:TDN
author: M. Zhang and J. G. Delgado-Frias and S. Vassiliadis
title: Table driven Newton scheme for high precision logarithm generation
journal: j-IEE-PROC-COMPUT-DIGIT-TECH
volume: 141
number: 5
pages: 281--292
month: sep
monthnumber: 9
year: 1994
CODEN: ICDTEA
ISSN: 1350-2387 (print), 1359-7027 (electronic) OR 13502387 (print), 13597027 (electronic)
ISSNL: 1350-2387 OR 13502387
bibdate: Tue Dec 12 09:29:07 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.12 09:29:07 MST
fjournal: IEE Proceedings. Computers and Digital Techniques
acknowledgement: ack-nhfb
affiliation: McCaw Cellular Commun. Inc., Kirkland, WA, USA
thesaurus: Digital arithmetic; Iterative methods; Table lookup
rawauthor: M. Zhang and J. G. Delgado-Frias and S. Vassiliadis
rawtitle: Table driven {Newton} scheme for high precision logarithm generation
abstract:
Based on the Newton method, a table driven iterative scheme is proposed to compute the logarithm function. The proposed scheme provides high performance and high precision and it is implementable with currently available technologies. It is shown, assuming the availability of a parallel multiplier and an adder and the IEEE floating point format, that a computation delay of 12 machine cycles can be obtained with precision of 0.761*2/sup -53/ requiring 18432 bytes of read only memory (ROM). Based on performance and look-up table size estimations of other existing schemes also using table driven approaches a speed-up of over 1.5 for the proposed scheme can be obtained.

keywords:
12 Machine cycles; Adder; High precision logarithm generation; IEEE floating point format; Iterative scheme; Newton method; Parallel multiplier; Table driven

rawabstract:
Based on the Newton method, a table driven iterative scheme is proposed to compute the logarithm function. The proposed scheme provides high performance and high precision and it is implementable with currently available technologies. It is shown, assuming the availability of a parallel multiplier and an adder and the IEEE floating point format, that a computation delay of 12 machine cycles can be obtained with precision of 0.761*2/sup -53/ requiring 18432 bytes of read only memory (ROM). Based on performance and look-up table size estimations of other existing schemes also using table driven approaches a speed-up of over 1.5 for the proposed scheme can be obtained.

entry:
@Article{Zhang:1994:TDN,
  author =       "M. Zhang and J. G. Delgado-Frias and S. Vassiliadis",
  title =        "Table driven {Newton} scheme for high precision
                 logarithm generation",
  journal =      j-IEE-PROC-COMPUT-DIGIT-TECH,
  volume =       "141",
  number =       "5",
  pages =        "281--292",
  month =        sep,
  year =         "1994",
  CODEN =        "ICDTEA",
  ISSN =         "1350-2387 (print), 1359-7027 (electronic)",
  ISSN-L =       "1350-2387",
  bibdate =      "Tue Dec 12 09:29:07 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "Based on the Newton method, a table driven iterative
                 scheme is proposed to compute the logarithm function.
                 The proposed scheme provides high performance and high
                 precision and it is implementable with currently
                 available technologies. It is shown, assuming the
                 availability of a parallel multiplier and an adder and
                 the IEEE floating point format, that a computation
                 delay of 12 machine cycles can be obtained with
                 precision of 0.761*2/sup -53/ requiring 18432 bytes of
                 read only memory (ROM). Based on performance and
                 look-up table size estimations of other existing
                 schemes also using table driven approaches a speed-up
                 of over 1.5 for the proposed scheme can be obtained.",
  acknowledgement = ack-nhfb,
  affiliation =  "McCaw Cellular Commun. Inc., Kirkland, WA, USA",
  classification = "C5230 (Digital arithmetic methods); C6130 (Data
                 handling techniques)",
  fjournal =     "IEE Proceedings. Computers and Digital Techniques",
  keywords =     "12 Machine cycles; Adder; High precision logarithm
                 generation; IEEE floating point format; Iterative
                 scheme; Newton method; Parallel multiplier; Table
                 driven",
  pubcountry =   "UK",
  thesaurus =    "Digital arithmetic; Iterative methods; Table lookup",
}


bibtype: article
filename: fparith.bib
label: Zuras:1994:MSM
author: D. Zuras
title: More On Squaring and Multiplying Large Integers
journal: j-IEEE-TRANS-COMPUT
volume: 43
number: 8
pages: 899--908
month: aug
monthnumber: 8
year: 1994
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.295852
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Mon May 20 06:16:49 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:16:49 MDT
fjournal: IEEE Transactions on Computers
remark: Selected revised and extended papers from ARITH'11 cite Swartzlander:1993:SCA.
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: D. Zuras
rawtitle: More On Squaring and Multiplying Large Integers
entry:
@Article{Zuras:1994:MSM,
  author =       "D. Zuras",
  title =        "More On Squaring and Multiplying Large Integers",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "43",
  number =       "8",
  pages =        "899--908",
  month =        aug,
  year =         "1994",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.295852",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Mon May 20 06:16:49 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
  remark =       "Selected revised and extended papers from ARITH'11
                 \cite{Swartzlander:1993:SCA}.",
}


bibtype: article
filename: fparith.bib
label: Zuse:1994:PPV
author: K. Zuse
title: Past and present view on computer architecture
journal: j-IFIP-TRANS-A
volume: A-52
pages: 248--250
year: 1994
CODEN: ITATEC
ISSN: 0926-5473 OR 09265473
bibdate: Tue Dec 12 09:29:07 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.12 09:29:07 MST
note: Applications and Impacts. Information Processing '94 IFIP 13th World Computer Congress.
fjournal: IFIP Transactions. A. Computer Science and Technology
acknowledgement: ack-nhfb
thesaurus: Computer architecture; Digital computers; History
rawauthor: K. Zuse
rawnote: Applications and Impacts. Information Processing '94 IFIP 13th World Computer Congress.
rawtitle: Past and present view on computer architecture
abstract:
The author discusses his work in developing binary instruction stream based computers. He chose the half-logarithmic form, where he stored only the exponent in a logarithmic notation, which is the same as the floating point numbers, used in today's computers. Following this principle, he developed new machines. He started with a mechanical working construction. This was a storage utility which was concentrated and enabled the storage of a thousand words. This storage device was completed in 1936. It occurred to him that one could also build this machine with electrical parts. First he built small computers, the model Z2 and immediately after this the model Z3, which was based entirely on relays. Both machines worked satisfactory. Then he discovered Boolean algebra. He could now design a computer on paper. He continued to develop machines and founded a company in Germany where a number of machines such as the Z11 were built.

keywords:
Binary instruction stream based computers; Boolean algebra; Computer architecture; Exponent; Floating point numbers; Half-logarithmic form; Storage device; Z11; Z2; Z3; ZUSE KG

rawabstract:
The author discusses his work in developing binary instruction stream based computers. He chose the half-logarithmic form, where he stored only the exponent in a logarithmic notation, which is the same as the floating point numbers, used in today's computers. Following this principle, he developed new machines. He started with a mechanical working construction. This was a storage utility which was concentrated and enabled the storage of a thousand words. This storage device was completed in 1936. It occurred to him that one could also build this machine with electrical parts. First he built small computers, the model Z2 and immediately after this the model Z3, which was based entirely on relays. Both machines worked satisfactory. Then he discovered Boolean algebra. He could now design a computer on paper. He continued to develop machines and founded a company in Germany where a number of machines such as the Z11 were built.

entry:
@Article{Zuse:1994:PPV,
  author =       "K. Zuse",
  title =        "Past and present view on computer architecture",
  journal =      j-IFIP-TRANS-A,
  volume =       "A-52",
  pages =        "248--250",
  month =        "????",
  year =         "1994",
  CODEN =        "ITATEC",
  ISSN =         "0926-5473",
  bibdate =      "Tue Dec 12 09:29:07 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "Applications and Impacts. Information Processing '94
                 IFIP 13th World Computer Congress.",
  abstract =     "The author discusses his work in developing binary
                 instruction stream based computers. He chose the
                 half-logarithmic form, where he stored only the
                 exponent in a logarithmic notation, which is the same
                 as the floating point numbers, used in today's
                 computers. Following this principle, he developed new
                 machines. He started with a mechanical working
                 construction. This was a storage utility which was
                 concentrated and enabled the storage of a thousand
                 words. This storage device was completed in 1936. It
                 occurred to him that one could also build this machine
                 with electrical parts. First he built small computers,
                 the model Z2 and immediately after this the model Z3,
                 which was based entirely on relays. Both machines
                 worked satisfactory. Then he discovered Boolean
                 algebra. He could now design a computer on paper. He
                 continued to develop machines and founded a company in
                 Germany where a number of machines such as the Z11 were
                 built.",
  acknowledgement = ack-nhfb,
  classification = "C0200 (General computer topics); C5220 (Computer
                 architecture); C5420 (Mainframes and minicomputers)",
  confdate =     "28 Aug.-2 Sept. 1994",
  conflocation = "Hamburg, Germany",
  fjournal =     "IFIP Transactions. A. Computer Science and
                 Technology",
  keywords =     "Binary instruction stream based computers; Boolean
                 algebra; Computer architecture; Exponent; Floating
                 point numbers; Half-logarithmic form; Storage device;
                 Z11; Z2; Z3; ZUSE KG",
  pubcountry =   "Netherlands",
  thesaurus =    "Computer architecture; Digital computers; History",
}


bibtype: inproceedings
filename: fparith.bib
label: Aagaard:1995:FVP
author: M. Aagaard and C. Seger
title: The formal verification of a pipelined double-precision IEEE floating-point multiplier
crossref: IEEE:1995:IAI
pages: 7--10
year: 1995
bibdate: Sat Jun 02 07:46:35 2001
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2001.06.02 07:46:35 ???
acknowledgement: ack-nhfb
rawauthor: M. Aagaard and C. Seger
rawtitle: The formal verification of a pipelined double-precision {IEEE} floating-point multiplier
entry:
@InProceedings{Aagaard:1995:FVP,
  author =       "M. Aagaard and C. Seger",
  title =        "The formal verification of a pipelined
                 double-precision {IEEE} floating-point multiplier",
  crossref =     "IEEE:1995:IAI",
  pages =        "7--10",
  year =         "1995",
  bibdate =      "Sat Jun 02 07:46:35 2001",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
}


bibtype: inproceedings
filename: fparith.bib
label: Abdallah:1995:SASa
author: M. Abdallah and A. Skavantzos
booktitle: Proceedings of the Twenty-Seventh Southeastern Symposium on System Theory, 12--14 March 1995
title: A systematic approach for selecting practical moduli sets for residue number systems
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 445--449
year: 1995
DOI: https://doi.org/10.1109/SSST.1995.390542
bibdate: Fri Nov 9 11:38:58 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:58 MST
keywords: residue arithmetic; residue number system
acknowledgement: ack-nhfb
rawauthor: M. Abdallah and A. Skavantzos
rawbooktitle: Proceedings of the Twenty-Seventh Southeastern Symposium on System Theory, 12--14 March 1995
rawtitle: A systematic approach for selecting practical moduli sets for residue number systems
entry:
@InProceedings{Abdallah:1995:SASa,
  author =       "M. Abdallah and A. Skavantzos",
  booktitle =    "Proceedings of the Twenty-Seventh Southeastern
                 Symposium on System Theory, 12--14 March 1995",
  title =        "A systematic approach for selecting practical moduli
                 sets for residue number systems",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "445--449",
  year =         "1995",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1109/SSST.1995.390542",
  ISSN =         "????",
  bibdate =      "Fri Nov 9 11:38:58 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "residue arithmetic; residue number system",
  summary =      "The residue number system (RNS) is a useful tool for
                 digital signal processing (DSP) since it can support
                 parallel, carry free, high speed arithmetic. An RNS is
                 defined by a set of relatively prime integers called
                 the moduli set. The most important \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Abdallah:1995:SASb
author: M. Abdallah and A. Skavantzos
booktitle: Proceedings of the Twenty-Seventh Southeastern Symposium on System Theory, 12--14 March 1995
title: A systematic approach for selecting practical moduli sets for residue number systems
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 445--449
year: 1995
DOI: https://doi.org/10.1109/SSST.1995.390542
bibdate: Fri Nov 9 11:38:58 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:58 MST
keywords: residue arithmetic; residue number system
acknowledgement: ack-nhfb
rawauthor: M. Abdallah and A. Skavantzos
rawbooktitle: Proceedings of the Twenty-Seventh Southeastern Symposium on System Theory, 12--14 March 1995
rawtitle: A systematic approach for selecting practical moduli sets for residue number systems
entry:
@InProceedings{Abdallah:1995:SASb,
  author =       "M. Abdallah and A. Skavantzos",
  booktitle =    "Proceedings of the Twenty-Seventh Southeastern
                 Symposium on System Theory, 12--14 March 1995",
  title =        "A systematic approach for selecting practical moduli
                 sets for residue number systems",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "445--449",
  year =         "1995",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1109/SSST.1995.390542",
  ISSN =         "????",
  bibdate =      "Fri Nov 9 11:38:58 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "residue arithmetic; residue number system",
  summary =      "The residue number system (RNS) is a useful tool for
                 digital signal processing (DSP) since it can support
                 parallel, carry free, high speed arithmetic. An RNS is
                 defined by a set of relatively prime integers called
                 the moduli set. The most important \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Al-Mouhamed:1995:ELF
author: Mayez Al-Mouhamed and Lubomir Bic
title: Effects of Loop Fusion and Statement Migration on the Speedup of Vector Multiprocessors
journal: j-J-PAR-DIST-COMP
volume: 31
number: 1
pages: 56--64
day: 15
month: nov
monthnumber: 11
year: 1995
CODEN: JPDCER
DOI: https://doi.org/10.1006/jpdc.1995.1144
ISSN: 0743-7315 (print), 1096-0848 (electronic) OR 07437315 (print), 10960848 (electronic)
ISSNL: 0743-7315 OR 07437315
bibdate: Thu Mar 9 09:18:58 MST 2000
bibtimestamp: 2000.03.09 09:18:58 MST
fjournal: Journal of Parallel and Distributed Computing
acknowledgement: ack-nhfb
corpsource: Department of Comput. Eng., King Fahd University of Pet. and Miner., Dhahran, Saudi Arabia
journalURL: http://www.sciencedirect.com/science/journal/07437315
treatment: P Practical
rawauthor: Mayez Al-Mouhamed and Lubomir Bic
rawtitle: Effects of Loop Fusion and Statement Migration on the Speedup of Vector Multiprocessors
URL:
http://www.idealibrary.com/links/doi/10.1006/jpdc.1995.1144/production; http://www.idealibrary.com/links/doi/10.1006/jpdc.1995.1144/production/pdf

keywords:
arithmetic pipelines; C240; cache reuse; commercial optimizing compiler; load and store operations; loop fusion; optimising compilers; optimization; parallel architectures; parallel-vector loops; processor; resource allocation; scheduled; scheduling; statement migration; vector multiprocessors; vector processor systems

entry:
@Article{Al-Mouhamed:1995:ELF,
  author =       "Mayez Al-Mouhamed and Lubomir Bic",
  title =        "Effects of Loop Fusion and Statement Migration on the
                 Speedup of Vector Multiprocessors",
  journal =      j-J-PAR-DIST-COMP,
  volume =       "31",
  number =       "1",
  pages =        "56--64",
  day =          "15",
  month =        nov,
  year =         "1995",
  CODEN =        "JPDCER",
  DOI =          "https://doi.org/10.1006/jpdc.1995.1144",
  ISSN =         "0743-7315 (print), 1096-0848 (electronic)",
  ISSN-L =       "0743-7315",
  bibdate =      "Thu Mar 9 09:18:58 MST 2000",
  bibsource =    "http://www.idealibrary.com/servlet/useragent?func=showAllIssues&curIssueID=jpdc;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.idealibrary.com/links/doi/10.1006/jpdc.1995.1144/production;
                 http://www.idealibrary.com/links/doi/10.1006/jpdc.1995.1144/production/pdf",
  acknowledgement = ack-nhfb,
  classification = "C5220P (Parallel architecture); C6150C (Compilers,
                 interpreters and other processors); C6150N (Distributed
                 systems software)",
  corpsource =   "Department of Comput. Eng., King Fahd University of
                 Pet. and Miner., Dhahran, Saudi Arabia",
  fjournal =     "Journal of Parallel and Distributed Computing",
  journal-URL =  "http://www.sciencedirect.com/science/journal/07437315",
  keywords =     "arithmetic pipelines; C240; cache reuse; commercial
                 optimizing compiler; load and store operations; loop
                 fusion; optimising compilers; optimization; parallel
                 architectures; parallel-vector loops; processor;
                 resource allocation; scheduled; scheduling; statement
                 migration; vector multiprocessors; vector processor
                 systems",
  treatment =    "P Practical",
}


bibtype: techreport
filename: fparith.bib
label: Altwaijry:1995:PAT
author: H. Altwaijry and M. Flynn
title: Performance / area tradeoffs in Booth multipliers
type: Technical Report
number: CSL-TR-95-684
institution: Computer Systems Laboratory, Stanford University
address: Stanford, CA, USA
pages: 56--64
month: nov
monthnumber: 11
year: 1995
bibdate: Thu Apr 2 08:38:35 1998
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1998.04.02 08:38:35 ???
acknowledgement: ack-sfo
rawauthor: H. Altwaijry and M. Flynn
rawtitle: Performance\slash area tradeoffs in {Booth} multipliers
entry:
@TechReport{Altwaijry:1995:PAT,
  author =       "H. Altwaijry and M. Flynn",
  title =        "Performance\slash area tradeoffs in {Booth}
                 multipliers",
  type =         "Technical Report",
  number =       "CSL-TR-95-684",
  institution =  "Computer Systems Laboratory, Stanford University",
  address =      "Stanford, CA, USA",
  month =        nov,
  year =         "1995",
  bibdate =      "Thu Apr 2 08:38:35 1998",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-sfo # " and " # ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Anonymous:1995:FEF
author: Anonymous
title: Fraction eliminate floating-point multiply
journal: j-EDN
volume: 40
number: 24
pages: 88--??
year: 1995
CODEN: EDNSBH
ISSN: 0012-7515, 0364-6637 OR 00127515, 03646637
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
fjournal: EDN
acknowledgement: ack-nhfb
rawauthor: Anonymous
rawtitle: Fraction eliminate floating-point multiply
entry:
@Article{Anonymous:1995:FEF,
  author =       "Anonymous",
  title =        "Fraction eliminate floating-point multiply",
  journal =      j-EDN,
  volume =       "40",
  number =       "24",
  pages =        "88--??",
  year =         "1995",
  CODEN =        "EDNSBH",
  ISSN =         "0012-7515, 0364-6637",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "EDN",
}


bibtype: article
filename: fparith.bib
label: Anonymous:1995:INM
author: Anonymous
journal: j-OPEN-SYSTEMS-TODAY
number: 169
pages: 32--??
month: feb
monthnumber: 2
year: 1995
ISSN: 1061-0839 OR 10610839
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
fjournal: Open Systems Today
acknowledgement: ack-nhfb
rawauthor: Anonymous
title:
IBM's new Model 3CT RS / 6000 workstation provides the industry's best floating-point price / performance numbers in the US$35,000 to US$50,000 price range

rawtitle:
{IBM}'s new {Model 3CT RS\slash 6000} workstation provides the industry's best floating-point price\slash performance numbers in the {US}\$35,000 to {US}\$50,000 price range

entry:
@Article{Anonymous:1995:INM,
  author =       "Anonymous",
  title =        "{IBM}'s new {Model 3CT RS\slash 6000} workstation
                 provides the industry's best floating-point price\slash
                 performance numbers in the {US}\$35,000 to {US}\$50,000
                 price range",
  journal =      j-OPEN-SYSTEMS-TODAY,
  volume =       "??",
  number =       "169",
  pages =        "32--??",
  month =        feb,
  year =         "1995",
  ISSN =         "1061-0839",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "Open Systems Today",
}


bibtype: article
filename: fparith.bib
label: Anonymous:1995:MVW
author: Anonymous
journal: j-IEEE-MICRO
volume: 15
number: 2
pages: 88--??
month: mar
monthnumber: 3
year: 1995
CODEN: IEMIDZ
ISSN: 0272-1732 (print), 1937-4143 (electronic) OR 02721732 (print), 19374143 (electronic)
ISSNL: 0272-1732 OR 02721732
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
fjournal: IEEE Micro
acknowledgement: ack-nhfb
journalURL: http://www.computer.org/csdl/mags/mi/index.html
rawauthor: Anonymous
title:
Micro View --- What lessons can chip makers and their customers take from the Pentium floating-point divide flaw and the resultant tidal wave of publicity?

rawtitle:
Micro View --- What lessons can chip makers and their customers take from the {Pentium} floating-point divide flaw and the resultant tidal wave of publicity?

entry:
@Article{Anonymous:1995:MVW,
  author =       "Anonymous",
  title =        "Micro View --- What lessons can chip makers and their
                 customers take from the {Pentium} floating-point divide
                 flaw and the resultant tidal wave of publicity?",
  journal =      j-IEEE-MICRO,
  volume =       "15",
  number =       "2",
  pages =        "88--??",
  month =        mar # "\slash " # apr,
  year =         "1995",
  CODEN =        "IEMIDZ",
  ISSN =         "0272-1732 (print), 1937-4143 (electronic)",
  ISSN-L =       "0272-1732",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Micro",
  journal-URL =  "http://www.computer.org/csdl/mags/mi/index.html",
}


bibtype: article
filename: fparith.bib
label: Anonymous:1995:PCH
author: Anonymous
title: Program converts hex to floating point
journal: j-EDN
volume: 40
number: 15
pages: 76--??
year: 1995
CODEN: EDNSBH
ISSN: 0012-7515, 0364-6637 OR 00127515, 03646637
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
fjournal: EDN
acknowledgement: ack-nhfb
rawauthor: Anonymous
rawtitle: Program converts hex to floating point
entry:
@Article{Anonymous:1995:PCH,
  author =       "Anonymous",
  title =        "Program converts hex to floating point",
  journal =      j-EDN,
  volume =       "40",
  number =       "15",
  pages =        "76--??",
  year =         "1995",
  CODEN =        "EDNSBH",
  ISSN =         "0012-7515, 0364-6637",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "EDN",
}


bibtype: inproceedings
filename: fparith.bib
label: Antelo:1995:RCR
author: Elisardo Antelo and Javier D. Bruguera and Julio Villalba and Emilio L. Zapata
title: Redundant CORDIC Rotator Based on Parallel Prediction
crossref: Knowles:1995:PSC
pages: 172--179
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Antelo.pdf
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: Elisardo Antelo and Javier D. Bruguera and Julio Villalba and Emilio L. Zapata
rawtitle: Redundant {CORDIC} Rotator Based on Parallel Prediction
entry:
@InProceedings{Antelo:1995:RCR,
  author =       "Elisardo Antelo and Javier D. Bruguera and Julio
                 Villalba and Emilio L. Zapata",
  title =        "Redundant {CORDIC} Rotator Based on Parallel
                 Prediction",
  crossref =     "Knowles:1995:PSC",
  pages =        "172--179",
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Antelo.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: article
filename: fparith.bib
label: Bailey:1995:FBM
author: David H. Bailey
title: A Fortran-90 Based Multiprecision System
journal: j-TOMS
volume: 21
number: 4
pages: 379--387
month: dec
monthnumber: 12
year: 1995
CODEN: ACMSCU
DOI: https://doi.org/10.1145/212066.212075
ISSN: 0098-3500 (print), 1557-7295 (electronic) OR 00983500 (print), 15577295 (electronic)
ISSNL: 0098-3500 OR 00983500
bibdate: Thu Apr 29 15:15:44 1999
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1999.04.29 15:15:44 ???
note: See also extension to complex arithmetic cite Smith:1998:AMP.
URL: http://www.acm.org/pubs/citations/journals/toms/1995-21-4/p379-bailey/
fjournal: ACM Transactions on Mathematical Software (TOMS)
keywords: arithmetic; Fortran 90; multiprecision
acknowledgement: ack-rfb
journalURL: https://dl.acm.org/loi/toms
rawauthor: David H. Bailey
rawnote: See also extension to complex arithmetic \cite{Smith:1998:AMP}.
rawtitle: A {Fortran-90} Based Multiprecision System
subject:
D.3.2 [Programming Languages]: Language Classifications -- Fortran 90; D.3.4 [Programming Languages]: Processors; G.1.0 [Numerical Analysis]: General; G.1.2 [Numerical Analysis]: Approximation

entry:
@Article{Bailey:1995:FBM,
  author =       "David H. Bailey",
  title =        "A {Fortran-90} Based Multiprecision System",
  journal =      j-TOMS,
  volume =       "21",
  number =       "4",
  pages =        "379--387",
  month =        dec,
  year =         "1995",
  CODEN =        "ACMSCU",
  DOI =          "https://doi.org/10.1145/212066.212075",
  ISSN =         "0098-3500 (print), 1557-7295 (electronic)",
  ISSN-L =       "0098-3500",
  bibdate =      "Thu Apr 29 15:15:44 1999",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "See also extension to complex arithmetic
                 \cite{Smith:1998:AMP}.",
  URL =          "http://www.acm.org/pubs/citations/journals/toms/1995-21-4/p379-bailey/",
  acknowledgement = ack-rfb,
  fjournal =     "ACM Transactions on Mathematical Software (TOMS)",
  journal-URL =  "https://dl.acm.org/loi/toms",
  keywords =     "arithmetic; Fortran 90; multiprecision",
  subject =      "D.3.2 [Programming Languages]: Language
                 Classifications -- Fortran 90; D.3.4 [Programming
                 Languages]: Processors; G.1.0 [Numerical Analysis]:
                 General; G.1.2 [Numerical Analysis]: Approximation",
}


bibtype: inproceedings
filename: fparith.bib
label: Bannon:1995:IAA
author: P. Bannon and J. Keller
title: Internal architecture of Alpha 21164 microprocessor
crossref: IEEE:1995:DPC
pages: 79--87
month: mar
monthnumber: 3
year: 1995
bibdate: Thu Apr 2 08:38:35 1998
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1998.04.02 08:38:35 ???
acknowledgement: ack-sfo
rawauthor: P. Bannon and J. Keller
rawtitle: Internal architecture of {Alpha 21164} microprocessor
entry:
@InProceedings{Bannon:1995:IAA,
  author =       "P. Bannon and J. Keller",
  title =        "Internal architecture of {Alpha 21164}
                 microprocessor",
  crossref =     "IEEE:1995:DPC",
  pages =        "79--87",
  month =        mar,
  year =         "1995",
  bibdate =      "Thu Apr 2 08:38:35 1998",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-sfo # " and " # ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Baron:1995:FPP
author: P. Baron and A. Joudon and F. Lugiez and M. Rouger
title: Floating Point Processor for Photomultiplier Tube Signals
journal: j-IEEE-TRANS-NUCL-SCI
volume: 42
number: 4
pages: 750--752
month: aug
monthnumber: 8
year: 1995
CODEN: IRNSAM
ISSN: 0018-9499 (print), 1558-1578 (electronic) OR 00189499 (print), 15581578 (electronic)
ISSNL: 0018-9499 OR 00189499
bibdate: Sat Jul 16 08:40:52 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 08:40:52 MDT
fjournal: IEEE Transactions on Nuclear Science
acknowledgement: ack-nhfb
journalURL: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=23
rawauthor: P. Baron and A. Joudon and F. Lugiez and M. Rouger
rawtitle: Floating Point Processor for Photomultiplier Tube Signals
entry:
@Article{Baron:1995:FPP,
  author =       "P. Baron and A. Joudon and F. Lugiez and M. Rouger",
  title =        "Floating Point Processor for Photomultiplier Tube
                 Signals",
  journal =      j-IEEE-TRANS-NUCL-SCI,
  volume =       "42",
  number =       "4",
  pages =        "750--752",
  month =        aug,
  year =         "1995",
  CODEN =        "IRNSAM",
  ISSN =         "0018-9499 (print), 1558-1578 (electronic)",
  ISSN-L =       "0018-9499",
  bibdate =      "Sat Jul 16 08:40:52 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Nuclear Science",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=23",
  summary =      "A fast digital readout system has been designed for
                 synchronous processing of the current signals delivered
                 by a 64-channel multichannel photomultiplier tube
                 (MCPMT) associated with fast scintillators. This mixed
                 analog digital full custom chip uses \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Bauer:1995:AEB
author: P. H. Bauer
title: Absolute Error Bounds for Block Floating-Point Direct-Form Digital Filters
journal: j-IEEE-TRANS-SIG-PROC
volume: 43
number: 8
pages: 1994--1996
month: aug
monthnumber: 8
year: 1995
CODEN: ITPRED
ISSN: 1053-587X (print), 1941-0476 (electronic) OR 1053587X (print), 19410476 (electronic)
ISSNL: 1053-587X OR 1053587X
bibdate: Sat Jul 16 08:40:52 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 08:40:52 MDT
fjournal: IEEE Transactions on Signal Processing
acknowledgement: ack-nhfb
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=78
rawauthor: P. H. Bauer
rawtitle: Absolute Error Bounds for Block Floating-Point Direct-Form Digital Filters
entry:
@Article{Bauer:1995:AEB,
  author =       "P. H. Bauer",
  title =        "Absolute Error Bounds for Block Floating-Point
                 Direct-Form Digital Filters",
  journal =      j-IEEE-TRANS-SIG-PROC,
  volume =       "43",
  number =       "8",
  pages =        "1994--1996",
  month =        aug,
  year =         "1995",
  CODEN =        "ITPRED",
  ISSN =         "1053-587X (print), 1941-0476 (electronic)",
  ISSN-L =       "1053-587X",
  bibdate =      "Sat Jul 16 08:40:52 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Signal Processing",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=78",
  summary =      "Provides an asymptotic response analysis of digital
                 filters, which are implemented in block floating-point
                 format. Using absolute bounds on the quantization
                 error, conditions for the existence of certain response
                 types and the corresponding bounds on \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Bauer:1995:ARE
author: P. H. Bauer
title: Absolute Response Error Bounds for Floating Point Digital Filters in State Space Representation
journal: j-IEEE-TRANS-CIRCUITS-SYST-2
volume: 42
number: 9
pages: 610--613
month: sep
monthnumber: 9
year: 1995
CODEN: ICSPE5
DOI: https://doi.org/10.1109/82.466642
ISSN: 1057-7130 (print), 1558-125X (electronic) OR 10577130 (print), 1558125X (electronic)
ISSNL: 1057-7130 OR 10577130
bibdate: Sat Jul 16 08:40:52 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 08:40:52 MDT
fjournal: IEEE Transactions on Circuits and Systems. 2, Analog and Digital Signal Processing
acknowledgement: ack-nhfb
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=82
rawauthor: P. H. Bauer
rawtitle: Absolute Response Error Bounds for Floating Point Digital Filters in State Space Representation
entry:
@Article{Bauer:1995:ARE,
  author =       "P. H. Bauer",
  title =        "Absolute Response Error Bounds for Floating Point
                 Digital Filters in State Space Representation",
  journal =      j-IEEE-TRANS-CIRCUITS-SYST-2,
  volume =       "42",
  number =       "9",
  pages =        "610--613",
  month =        sep,
  year =         "1995",
  CODEN =        "ICSPE5",
  DOI =          "https://doi.org/10.1109/82.466642",
  ISSN =         "1057-7130 (print), 1558-125X (electronic)",
  ISSN-L =       "1057-7130",
  bibdate =      "Sat Jul 16 08:40:52 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Circuits and Systems. 2, Analog
                 and Digital Signal Processing",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=82",
  summary =      "A deterministic study of the zero input asymptotic
                 behavior of second order state space digital filters
                 with floating point arithmetic is carried out. Using a
                 consecutive bound reduction method, asymptotic bounds
                 on the state response are derived. It \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Baumhof:1995:NVV
author: Christoph Baumhof
title: A New VLSI Vector Arithmetic Coprocessor for the PC
crossref: Knowles:1995:PSC
pages: 210--215
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Baumhof.pdf
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: Christoph Baumhof
rawtitle: A New {VLSI} Vector Arithmetic Coprocessor for the {PC}
entry:
@InProceedings{Baumhof:1995:NVV,
  author =       "Christoph Baumhof",
  title =        "A New {VLSI} Vector Arithmetic Coprocessor for the
                 {PC}",
  crossref =     "Knowles:1995:PSC",
  pages =        "210--215",
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Baumhof.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: article
filename: fparith.bib
label: Beaty:1995:EAS
author: Steven J. Beaty and Gearold R. Johnson
title: Effect of adding a scalar D-cache to the Cray-4 vector processor
journal: j-IEEE-INT-CONF-ALG-ARCH-PAR-PROC
volume: 1
pages: 227--230
year: 1995
bibdate: Mon Aug 26 10:51:12 MDT 1996
bibsource: Compendex database; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.08.26 10:51:12 MDT
note: IEEE catalog number 95TH0682-5.
fjournal: IEEE International Conference on Algorithms and Architectures for Parallel Processing
acknowledgement: ack-nhfb
affiliation: Cray Computer Corp
affiliationaddress: Colorado Springs, CO, USA
journalabr: IEEE Int Conf Algorithms Archit Parall Process
rawauthor: Steven J. Beaty and Gearold R. Johnson
rawnote: IEEE catalog number 95TH0682-5.
rawtitle: Effect of adding a scalar {D-cache} to the {Cray-4} vector processor
abstract:
In the past, vector supercomputers achieved high performance with long arithmetic pipelines coupled with fast scalar processors. Processor speed has increased at a rate greater than memory speed. Indeed, current vector processors have cycle times far faster than the memories they are connected to. When compilers can predict memory access patterns, they vectorize computations and thereby hide the processor / memory disparity. When memory access patterns are not known until run-time, caches can pay large dividends. This paper studies the effects of adding a scalar data cache to a modern vector processor and shows some encouraging results.

keywords:
Buffer storage; Cray memory hierarchy; Cray-4 vector processor; Data processing; Hierarchical systems; Program processors; Scalar D-cache; Supercomputers; Systems analysis

rawabstract:
In the past, vector supercomputers achieved high performance with long arithmetic pipelines coupled with fast scalar processors. Processor speed has increased at a rate greater than memory speed. Indeed, current vector processors have cycle times far faster than the memories they are connected to. When compilers can predict memory access patterns, they vectorize computations and thereby hide the processor\slash memory disparity. When memory access patterns are not known until run-time, caches can pay large dividends. This paper studies the effects of adding a scalar data cache to a modern vector processor and shows some encouraging results.

entry:
@Article{Beaty:1995:EAS,
  author =       "Steven J. Beaty and Gearold R. Johnson",
  title =        "Effect of adding a scalar {D-cache} to the {Cray-4}
                 vector processor",
  journal =      j-IEEE-INT-CONF-ALG-ARCH-PAR-PROC,
  volume =       "1",
  pages =        "227--230",
  year =         "1995",
  bibdate =      "Mon Aug 26 10:51:12 MDT 1996",
  bibsource =    "Compendex database;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "IEEE catalog number 95TH0682-5.",
  abstract =     "In the past, vector supercomputers achieved high
                 performance with long arithmetic pipelines coupled with
                 fast scalar processors. Processor speed has increased
                 at a rate greater than memory speed. Indeed, current
                 vector processors have cycle times far faster than the
                 memories they are connected to. When compilers can
                 predict memory access patterns, they vectorize
                 computations and thereby hide the processor\slash
                 memory disparity. When memory access patterns are not
                 known until run-time, caches can pay large dividends.
                 This paper studies the effects of adding a scalar data
                 cache to a modern vector processor and shows some
                 encouraging results.",
  acknowledgement = ack-nhfb,
  affiliation =  "Cray Computer Corp",
  affiliationaddress = "Colorado Springs, CO, USA",
  classification = "722.1; 722.4; 723.1; 723.2",
  conference =   "Proceedings of the IEEE 1st International Conference
                 on Algorithms and Architectures for Parallel
                 Processing. Part 1 (of 2)",
  fjournal =     "IEEE International Conference on Algorithms and
                 Architectures for Parallel Processing",
  journalabr =   "IEEE Int Conf Algorithms Archit Parall Process",
  keywords =     "Buffer storage; Cray memory hierarchy; Cray-4 vector
                 processor; Data processing; Hierarchical systems;
                 Program processors; Scalar D-cache; Supercomputers;
                 Systems analysis",
  meetingaddress = "Brisbane, Aust",
  meetingdate =  "Apr 19--21 1995",
  meetingdate2 = "04/19--21/95",
  sponsor =      "IEEE",
}


bibtype: inproceedings
filename: fparith.bib
label: Bederr:1995:AAE
author: H. Bederr and M. Nicolaidis and A. Guyot
title: Analytic Approach for Error Masking Elimination in On-Line Multipliers
crossref: Knowles:1995:PSC
pages: 30--37
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Bederr.pdf
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: H. Bederr and M. Nicolaidis and A. Guyot
rawtitle: Analytic Approach for Error Masking Elimination in On-Line Multipliers
entry:
@InProceedings{Bederr:1995:AAE,
  author =       "H. Bederr and M. Nicolaidis and A. Guyot",
  title =        "Analytic Approach for Error Masking Elimination in
                 On-Line Multipliers",
  crossref =     "Knowles:1995:PSC",
  pages =        "30--37",
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Bederr.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: article
filename: fparith.bib
label: Bickerstaff:1995:PRA
author: K'Andrea C. Bickerstaff and Michael J. Schulte and Earl E. Swartzlander, Jr.
title: Parallel reduced area multipliers
journal: j-J-VLSI-SIGNAL-PROC
volume: 9
number: 3
pages: 181--191
month: apr
monthnumber: 4
year: 1995
CODEN: JVSPED
DOI: https://doi.org/10.1007/BF02407084
ISSN: 0922-5773 (print), 1573-109X (electronic) OR 09225773 (print), 1573109X (electronic)
ISSNL: 0922-5773 OR 09225773
bibdate: Mon Mar 05 08:29:38 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.03.05 08:29:38 ???
URL: http://springerlink.metapress.com/content/761m0225754r4440/fulltext.pdf
fjournal: Journal of VLSI Signal Processing
acknowledgement: ack-nhfb
rawauthor: K'Andrea C. Bickerstaff and Michael J. Schulte and Earl E. {Swartzlander, Jr.}
rawtitle: Parallel reduced area multipliers
entry:
@Article{Bickerstaff:1995:PRA,
  author =       "K'Andrea C. Bickerstaff and Michael J. Schulte and
                 Earl E. {Swartzlander, Jr.}",
  title =        "Parallel reduced area multipliers",
  journal =      j-J-VLSI-SIGNAL-PROC,
  volume =       "9",
  number =       "3",
  pages =        "181--191",
  month =        apr,
  year =         "1995",
  CODEN =        "JVSPED",
  DOI =          "https://doi.org/10.1007/BF02407084",
  ISSN =         "0922-5773 (print), 1573-109X (electronic)",
  ISSN-L =       "0922-5773",
  bibdate =      "Mon Mar 05 08:29:38 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://springerlink.metapress.com/content/761m0225754r4440/fulltext.pdf",
  acknowledgement = ack-nhfb,
  fjournal =     "Journal of VLSI Signal Processing",
}


bibtype: article
filename: fparith.bib
label: Bierman:1995:FAI
author: Keith Bierman
title: Fortran access to IEEE 754 exceptions
journal: j-FORTRAN-FORUM
volume: 14
number: 3
pages: 15--18
month: sep
monthnumber: 9
year: 1995
ISSN: 1061-7264 (print), 1931-1311 (electronic) OR 10617264 (print), 19311311 (electronic)
ISSNL: 1061-7264 OR 10617264
bibdate: Wed Feb 6 18:50:05 MST 2002
bibsource: http://portal.acm.org/; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2002.02.06 18:50:05 MST
fjournal: ACM Fortran Forum
acknowledgement: ack-nhfb
journalURL: http://portal.acm.org/toc.cfm?id=J286
issue: 43
rawauthor: Keith Bierman
rawtitle: {Fortran} access to {IEEE 754} exceptions
entry:
@Article{Bierman:1995:FAI,
  author =       "Keith Bierman",
  title =        "{Fortran} access to {IEEE 754} exceptions",
  journal =      j-FORTRAN-FORUM,
  volume =       "14",
  number =       "3",
  pages =        "15--18",
  month =        sep,
  year =         "1995",
  CODEN =        "????",
  ISSN =         "1061-7264 (print), 1931-1311 (electronic)",
  ISSN-L =       "1061-7264",
  bibdate =      "Wed Feb 6 18:50:05 MST 2002",
  bibsource =    "http://portal.acm.org/;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "ACM Fortran Forum",
  issue =        "43",
  journal-URL =  "http://portal.acm.org/toc.cfm?id=J286",
}


bibtype: article
filename: fparith.bib
label: Boley:1995:FPF
author: D. Boley and G. H. Golub and S. Makar and N. Saxena and E. J. McCluskey
title: Floating Point Fault Tolerance with Backward Error Assertions
journal: j-IEEE-TRANS-COMPUT
volume: 44
number: 2
pages: 302--311
month: feb
monthnumber: 2
year: 1995
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.364541
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Wed Jul 6 08:01:26 MDT 2011
bibtimestamp: 2011.07.06 08:01:26 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=364541
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
affiliation: Department of Computer Science, Minnesota University, Minneapolis, MN, USA
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: D. Boley and G. H. Golub and S. Makar and N. Saxena and E. J. McCluskey
rawtitle: Floating Point Fault Tolerance with Backward Error Assertions
bibsource:
https://www.math.utah.edu/pub/bibnet/authors/g/golub-gene-h.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib

abstract:
The paper introduces an assertion scheme based on the backward error analysis for error detection in algorithms that solve dense systems of linear equations, Ax=b. Unlike previous methods, this backward error assertion model is specifically designed to operate in an environment of floating point arithmetic subject to round-off errors, and it can be easily instrumented in a Watchdog processor environment. The complexity of verifying assertions is O(n/sup 2/), compared to the O(n/sup 3/) complexity of algorithms solving Ax=b. Unlike other proposed error detection methods, this assertion model does not require any encoding of the matrix A. Experimental results under various error models are presented to validate the effectiveness of this assertion scheme.

keywords:
Assertion scheme; Backward error analysis; Backward error assertions; Complexity; Dense systems; Error detection; Error models; Floating point arithmetic; Floating point fault tolerance; Linear equations; Round-off errors; Watchdog processor environment

thesaurus:
Computational complexity; Error analysis; Error detection; Fault tolerant computing; Floating point arithmetic; Linear algebra

rawabstract:
The paper introduces an assertion scheme based on the backward error analysis for error detection in algorithms that solve dense systems of linear equations, Ax=b. Unlike previous methods, this backward error assertion model is specifically designed to operate in an environment of floating point arithmetic subject to round-off errors, and it can be easily instrumented in a Watchdog processor environment. The complexity of verifying assertions is O(n/sup 2/), compared to the O(n/sup 3/) complexity of algorithms solving Ax=b. Unlike other proposed error detection methods, this assertion model does not require any encoding of the matrix A. Experimental results under various error models are presented to validate the effectiveness of this assertion scheme.

entry:
@Article{Boley:1995:FPF,
  author =       "D. Boley and G. H. Golub and S. Makar and N. Saxena
                 and E. J. McCluskey",
  title =        "Floating Point Fault Tolerance with Backward Error
                 Assertions",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "44",
  number =       "2",
  pages =        "302--311",
  month =        feb,
  year =         "1995",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.364541",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Wed Jul 6 08:01:26 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/bibnet/authors/g/golub-gene-h.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=364541",
  abstract =     "The paper introduces an assertion scheme based on the
                 backward error analysis for error detection in
                 algorithms that solve dense systems of linear
                 equations, Ax=b. Unlike previous methods, this backward
                 error assertion model is specifically designed to
                 operate in an environment of floating point arithmetic
                 subject to round-off errors, and it can be easily
                 instrumented in a Watchdog processor environment. The
                 complexity of verifying assertions is O(n/sup 2/),
                 compared to the O(n/sup 3/) complexity of algorithms
                 solving Ax=b. Unlike other proposed error detection
                 methods, this assertion model does not require any
                 encoding of the matrix A. Experimental results under
                 various error models are presented to validate the
                 effectiveness of this assertion scheme.",
  acknowledgement = ack-nhfb,
  affiliation =  "Department of Computer Science, Minnesota University,
                 Minneapolis, MN, USA",
  ajournal =     "IEEE Trans. Comput.",
  classification = "C4140 (Linear algebra); C4240C (Computational
                 complexity); C5230 (Digital arithmetic methods); C5470
                 (Performance evaluation and testing)",
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
  keywords =     "Assertion scheme; Backward error analysis; Backward
                 error assertions; Complexity; Dense systems; Error
                 detection; Error models; Floating point arithmetic;
                 Floating point fault tolerance; Linear equations;
                 Round-off errors; Watchdog processor environment",
  summary =      "The paper introduces an assertion scheme based on the
                 backward error analysis for error detection in
                 algorithms that solve dense systems of linear
                 equations, Ax=b. Unlike previous methods, this backward
                 error assertion model is specifically designed
                 \ldots{}",
  thesaurus =    "Computational complexity; Error analysis; Error
                 detection; Fault tolerant computing; Floating point
                 arithmetic; Linear algebra",
}


bibtype: article
filename: fparith.bib
label: Bomar:1995:RNA
author: B. W. Bomar and L. M. Smith and R. D. Joseph
journal: Proceedings - IEEE International Symposium on Circuits and Systems
number: 3
pages: III-2023
year: 1995
ISSN: 0271-4310 OR 02714310
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
acknowledgement: ack-nhfb
rawauthor: B. W. Bomar and L. M. Smith and R. D. Joseph
title:
Roundoff Noise Analysis of State-Space Digital Filters Implemented on Floating-Point Digital Signal Processors

rawtitle:
Roundoff Noise Analysis of State-Space Digital Filters Implemented on Floating-Point Digital Signal Processors

entry:
@Article{Bomar:1995:RNA,
  author =       "B. W. Bomar and L. M. Smith and R. D. Joseph",
  title =        "Roundoff Noise Analysis of State-Space Digital Filters
                 Implemented on Floating-Point Digital Signal
                 Processors",
  journal =      "Proceedings - IEEE International Symposium on Circuits
                 and Systems",
  volume =       "??",
  number =       "3",
  pages =        "III-2023",
  year =         "1995",
  ISSN =         "0271-4310",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Booker:1995:FER
author: Alan Booker
title: Floating-Point Emulation and Representation
journal: j-EMBED-SYS-PROG
volume: 8
number: 9
pages: 111--??
year: 1995
CODEN: EYPRE4
ISSN: 1040-3272 OR 10403272
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
fjournal: Embedded Systems Programming
acknowledgement: ack-nhfb
rawauthor: Alan Booker
rawtitle: Floating-Point Emulation and Representation
entry:
@Article{Booker:1995:FER,
  author =       "Alan Booker",
  title =        "Floating-Point Emulation and Representation",
  journal =      j-EMBED-SYS-PROG,
  volume =       "8",
  number =       "9",
  pages =        "111--??",
  year =         "1995",
  CODEN =        "EYPRE4",
  ISSN =         "1040-3272",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "Embedded Systems Programming",
}


bibtype: article
filename: fparith.bib
label: BrinchHansen:1995:LDA
author: Per Brinch Hansen
title: The Long Division Algorithm of Linger, Mills and Witt
journal: j-SPE
volume: 25
number: 1
pages: 109--109
month: jan
monthnumber: 1
year: 1995
CODEN: SPEXBL
DOI: https://doi.org/10.1002/spe.4380250107
ISSN: 0038-0644 (print), 1097-024X (electronic) OR 00380644 (print), 1097024X (electronic)
ISSNL: 0038-0644 OR 00380644
bibdate: Sat May 31 13:36:16 MDT 1997
bibtimestamp: 1997.05.31 13:36:16 MDT
note: See cite Linger:1979:SPT,BrinchHansen:1994:MLD.
fjournal: Software --- Practice and Experience
acknowledgement: ack-nhfb
ajournal: Softw. Pract. Exp.
journalURL: http://onlinelibrary.wiley.com/journal/10.1002/(ISSN)1097-024X
onlinedate: 30 Oct 2006
rawauthor: Per {Brinch Hansen}
rawnote: See \cite{Linger:1979:SPT,BrinchHansen:1994:MLD}.
rawtitle: The Long Division Algorithm of {Linger}, {Mills} and {Witt}
bibsource:
https://www.math.utah.edu/pub/bibnet/authors/h/hansen-per-brinch.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/litprog.bib; https://www.math.utah.edu/pub/tex/bib/spe.bib

abstract:
The long division algorithm of Linger, Mills and Witt cite Linger:1979:SPT is discussed and found to be significantly slower than a recent algorithm developed by the author.

rawabstract:
The long division algorithm of Linger, Mills and Witt \cite{Linger:1979:SPT} is discussed and found to be significantly slower than a recent algorithm developed by the author.

entry:
@Article{BrinchHansen:1995:LDA,
  author =       "Per {Brinch Hansen}",
  title =        "The Long Division Algorithm of {Linger}, {Mills} and
                 {Witt}",
  journal =      j-SPE,
  volume =       "25",
  number =       "1",
  pages =        "109--109",
  month =        jan,
  year =         "1995",
  CODEN =        "SPEXBL",
  DOI =          "https://doi.org/10.1002/spe.4380250107",
  ISSN =         "0038-0644 (print), 1097-024X (electronic)",
  ISSN-L =       "0038-0644",
  bibdate =      "Sat May 31 13:36:16 MDT 1997",
  bibsource =    "https://www.math.utah.edu/pub/bibnet/authors/h/hansen-per-brinch.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/litprog.bib;
                 https://www.math.utah.edu/pub/tex/bib/spe.bib",
  note =         "See \cite{Linger:1979:SPT,BrinchHansen:1994:MLD}.",
  abstract =     "The long division algorithm of Linger, Mills and Witt
                 \cite{Linger:1979:SPT} is discussed and found to be
                 significantly slower than a recent algorithm developed
                 by the author.",
  acknowledgement = ack-nhfb,
  ajournal =     "Softw. Pract. Exp.",
  fjournal =     "Software --- Practice and Experience",
  journal-URL =  "http://onlinelibrary.wiley.com/journal/10.1002/(ISSN)1097-024X",
  onlinedate =   "30 Oct 2006",
}


bibtype: article
filename: fparith.bib
label: Burgess:1995:COT
author: N. Burgess and T. Williams
title: Choices of operand truncation in the SRT division algorithm
journal: j-IEEE-TRANS-COMPUT
volume: 44
number: 7
pages: 933--937
month: jul
monthnumber: 7
year: 1995
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.392852
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Wed Jul 6 08:01:28 MDT 2011
bibtimestamp: 2011.07.06 08:01:28 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=392852
fjournal: IEEE Transactions on Computers
acknowledgement: ack-sfo
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: N. Burgess and T. Williams
rawtitle: Choices of operand truncation in the {SRT} division algorithm
entry:
@Article{Burgess:1995:COT,
  author =       "N. Burgess and T. Williams",
  title =        "Choices of operand truncation in the {SRT} division
                 algorithm",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "44",
  number =       "7",
  pages =        "933--937",
  month =        jul,
  year =         "1995",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.392852",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Wed Jul 6 08:01:28 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=392852",
  acknowledgement = ack-sfo # " and " # ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: inproceedings
filename: fparith.bib
label: Burnikel:1995:EGC
title: Exact Geometric Computation in LEDA
crossref: ACM:1995:PEA
pages: C18--C19
year: 1995
bibdate: Tue Nov 13 21:49:22 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.13 21:49:22 ???
acknowledgement: ack-nhfb
rawtitle: Exact Geometric Computation in {LEDA}
author:
Christoph Burnikel and Jochen Konemann and Kurt Mehlhorn and Stefan Naher and Stefan Schirra and Christian Uhrig

rawauthor:
Christoph Burnikel and Jochen Konemann and Kurt Mehlhorn and Stefan Naher and Stefan Schirra and Christian Uhrig

entry:
@InProceedings{Burnikel:1995:EGC,
  author =       "Christoph Burnikel and Jochen Konemann and Kurt
                 Mehlhorn and Stefan Naher and Stefan Schirra and
                 Christian Uhrig",
  title =        "Exact Geometric Computation in {LEDA}",
  crossref =     "ACM:1995:PEA",
  pages =        "C18--C19",
  year =         "1995",
  bibdate =      "Tue Nov 13 21:49:22 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
}


bibtype: techreport
filename: fparith.bib
label: Carreno:1995:IIF
author: Victor A. Carreno
title: Interpretation of IEEE-854 floating-point standard and definition in the HOL system
type: NASA technical memorandum
number: 110189
institution: pub-NASA
address: pub-NASA:adr
year: 1995
bibdate: Thu Oct 24 14:19:35 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2002.10.24 14:19:35 MDT
note: Shipping list no. 96-0366-M.
keywords: floating-point arithmetic; formalism; standards
acknowledgement: ack-nhfb
rawauthor: Victor A. Carreno
rawnote: Shipping list no. 96-0366-M.
rawtitle: Interpretation of {IEEE-854} floating-point standard and definition in the {HOL} system
entry:
@TechReport{Carreno:1995:IIF,
  author =       "Victor A. Carreno",
  title =        "Interpretation of {IEEE-854} floating-point standard
                 and definition in the {HOL} system",
  type =         "{NASA} technical memorandum",
  number =       "110189",
  institution =  pub-NASA,
  address =      pub-NASA:adr,
  pages =        "????",
  year =         "1995",
  bibdate =      "Thu Oct 24 14:19:35 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "Shipping list no. 96-0366-M.",
  acknowledgement = ack-nhfb,
  keywords =     "floating-point arithmetic; formalism; standards",
}


bibtype: inproceedings
filename: fparith.bib
label: Carreno:1995:SIF
author: Victor A. Carreno and Paul S. Miner
title: Specification of the IEEE-854 Floating-Point Standard in HOL and PVS
crossref: Anonymous:1995:HEI
year: 1995
bibdate: Wed Nov 24 09:09:34 2004
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.11.24 09:09:34 ???
URL: http://shemesh.larc.nasa.gov/fm/ftp/larc/vac/hug95.ps
acknowledgement: ack-mfc
rawauthor: Victor A. Carre{\~n}o and Paul S. Miner
rawtitle: Specification of the {IEEE-854} Floating-Point Standard in {HOL} and {PVS}
entry:
@InProceedings{Carreno:1995:SIF,
  author =       "Victor A. Carre{\~n}o and Paul S. Miner",
  title =        "Specification of the {IEEE-854} Floating-Point
                 Standard in {HOL} and {PVS}",
  crossref =     "Anonymous:1995:HEI",
  year =         "1995",
  bibdate =      "Wed Nov 24 09:09:34 2004",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://shemesh.larc.nasa.gov/fm/ftp/larc/vac/hug95.ps",
  acknowledgement = ack-mfc # " and " # ack-nhfb,
  pagecount =    "16",
}


bibtype: inproceedings
filename: fparith.bib
label: Chang:1995:REA
author: P. S. Chang and A. N. Willson, Jr.
booktitle: Conference Record of the Twenty-Ninth Asilomar Conference on Signals, Systems and Computers, 1995
title: A roundoff error analysis of the normalized LMS algorithm
volume: 2
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1337--1341
year: 1995
bibdate: Sat Jul 16 11:25:07 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 11:25:07 MDT
acknowledgement: ack-nhfb
rawauthor: P. S. Chang and A. N. {Willson, Jr.}
rawbooktitle: Conference Record of the Twenty-Ninth Asilomar Conference on Signals, Systems and Computers, 1995
rawtitle: A roundoff error analysis of the normalized {LMS} algorithm
entry:
@InProceedings{Chang:1995:REA,
  author =       "P. S. Chang and A. N. {Willson, Jr.}",
  booktitle =    "Conference Record of the Twenty-Ninth Asilomar
                 Conference on Signals, Systems and Computers, 1995",
  title =        "A roundoff error analysis of the normalized {LMS}
                 algorithm",
  volume =       "2",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1337--1341",
  year =         "1995",
  CODEN =        "????",
  ISSN =         "????",
  bibdate =      "Sat Jul 16 11:25:07 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  summary =      "This paper describes an analysis of the normalized LMS
                 algorithm under finite word-length effects. It is shown
                 that, using the averaging principle, it is possible to
                 derive a good approximation for the total MSE in
                 steady-state. Implementation \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Chen:1995:UCA
author: San-Gee Chen and Chieh-Chih Li
booktitle: IEEE Signal Processing Society Workshop on VLSI Signal Processing, VIII, 1995
title: A unified cellular array for multiplication, division and square root
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 533--541
year: 1995
bibdate: Sat Jul 16 15:28:14 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 15:28:14 MDT
acknowledgement: ack-nhfb
rawauthor: San-Gee Chen and Chieh-Chih Li
rawbooktitle: {IEEE} Signal Processing Society Workshop on {VLSI} Signal Processing, {VIII, 1995}
rawtitle: A unified cellular array for multiplication, division and square root
entry:
@InProceedings{Chen:1995:UCA,
  author =       "San-Gee Chen and Chieh-Chih Li",
  booktitle =    "{IEEE} Signal Processing Society Workshop on {VLSI}
                 Signal Processing, {VIII, 1995}",
  title =        "A unified cellular array for multiplication, division
                 and square root",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "533--541",
  year =         "1995",
  CODEN =        "????",
  ISSN =         "????",
  bibdate =      "Sat Jul 16 15:28:14 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  summary =      "A unified fast, small-area processor capable of
                 executing multiplication, division and square-root
                 operations, all starting from MSD is proposed. Unlike
                 the existing designs which require both addition and
                 subtraction operations, and complicated \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Cheng:1995:PBS
author: Fuhua Cheng and G. W. Wasilkowski and Jiaye Wang and Caiming Zhang and Wenping Wang
title: Parallel B-Spline Surface Interpolation on a Mesh-Connected Processor Array
journal: j-J-PAR-DIST-COMP
volume: 24
number: 2
pages: 224--229
day: 1
month: feb
monthnumber: 2
year: 1995
CODEN: JPDCER
DOI: https://doi.org/10.1006/jpdc.1995.1022
ISSN: 0743-7315 (print), 1096-0848 (electronic) OR 07437315 (print), 10960848 (electronic)
ISSNL: 0743-7315 OR 07437315
bibdate: Thu Mar 9 09:18:56 MST 2000
bibtimestamp: 2000.03.09 09:18:56 MST
fjournal: Journal of Parallel and Distributed Computing
acknowledgement: ack-nhfb
corpsource: Department of Computer Science, Kentucky University, Lexington, KY, USA
journalURL: http://www.sciencedirect.com/science/journal/07437315
treatment: T Theoretical or Mathematical
rawauthor: Fuhua Cheng and G. W. Wasilkowski and Jiaye Wang and Caiming Zhang and Wenping Wang
rawtitle: Parallel {B}-Spline Surface Interpolation on a Mesh-Connected Processor Array
URL:
http://www.idealibrary.com/links/doi/10.1006/jpdc.1995.1022/production; http://www.idealibrary.com/links/doi/10.1006/jpdc.1995.1022/production/pdf

keywords:
algorithms; B-spline surface interpolation; bicubic B-spline surface; Chebyshev approximation; Chebyshev method; computational complexity; constant; control; data points; finite precision; floating-point arithmetic; interconnection networks; interpolation; iterative methods; mesh-connected processor array; multiprocessor; numerical stability; optimal; parallel; parallel implementation; points; splines (mathematics); time

entry:
@Article{Cheng:1995:PBS,
  author =       "Fuhua Cheng and G. W. Wasilkowski and Jiaye Wang and
                 Caiming Zhang and Wenping Wang",
  title =        "Parallel {B}-Spline Surface Interpolation on a
                 Mesh-Connected Processor Array",
  journal =      j-J-PAR-DIST-COMP,
  volume =       "24",
  number =       "2",
  pages =        "224--229",
  day =          "1",
  month =        feb,
  year =         "1995",
  CODEN =        "JPDCER",
  DOI =          "https://doi.org/10.1006/jpdc.1995.1022",
  ISSN =         "0743-7315 (print), 1096-0848 (electronic)",
  ISSN-L =       "0743-7315",
  bibdate =      "Thu Mar 9 09:18:56 MST 2000",
  bibsource =    "http://www.idealibrary.com/servlet/useragent?func=showAllIssues&curIssueID=jpdc;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.idealibrary.com/links/doi/10.1006/jpdc.1995.1022/production;
                 http://www.idealibrary.com/links/doi/10.1006/jpdc.1995.1022/production/pdf",
  acknowledgement = ack-nhfb,
  classification = "B0290F (Interpolation and function approximation);
                 C4130 (Interpolation and function approximation);
                 C4240C (Computational complexity); C4240P (Parallel
                 programming and algorithm theory)",
  corpsource =   "Department of Computer Science, Kentucky University,
                 Lexington, KY, USA",
  fjournal =     "Journal of Parallel and Distributed Computing",
  journal-URL =  "http://www.sciencedirect.com/science/journal/07437315",
  keywords =     "algorithms; B-spline surface interpolation; bicubic
                 B-spline surface; Chebyshev approximation; Chebyshev
                 method; computational complexity; constant; control;
                 data points; finite precision; floating-point
                 arithmetic; interconnection networks; interpolation;
                 iterative methods; mesh-connected processor array;
                 multiprocessor; numerical stability; optimal; parallel;
                 parallel implementation; points; splines (mathematics);
                 time",
  treatment =    "T Theoretical or Mathematical",
}


bibtype: phdthesis
filename: fparith.bib
label: Chesneaux:1995:LSL
author: Jean-Marie Chesneaux
type: Habilitation a diriger des recherches
school: Universite Pierre et Marie Curie
address: Paris, France
year: 1995
bibdate: Mon Mar 19 14:07:57 2018
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2018.03.19 14:07:57 ???
acknowledgement: ack-nhfb
rawauthor: Jean-Marie Chesneaux
title:
L'arithmetique stochastique et le logiciel CADNA. (French) [Stochastic arithmetic and CADNA software]

rawtitle:
L'arithm{\'e}tique stochastique et le logiciel {CADNA}. ({French}) [{Stochastic} arithmetic and {CADNA} software]

entry:
@PhdThesis{Chesneaux:1995:LSL,
  author =       "Jean-Marie Chesneaux",
  title =        "L'arithm{\'e}tique stochastique et le logiciel
                 {CADNA}. ({French}) [{Stochastic} arithmetic and
                 {CADNA} software]",
  type =         "Habilitation {\`a} diriger des recherches",
  school =       "Universit{\'e} Pierre et Marie Curie",
  address =      "Paris, France",
  pages =        "????",
  year =         "1995",
  bibdate =      "Mon Mar 19 14:07:57 2018",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Coe:1995:CAP
author: Tim Coe and Terje Mathisen and Cleve Moler and Vaughan Pratt
title: Computational Aspects of the Pentium Affair
journal: j-IEEE-COMPUT-SCI-ENG
volume: 2
number: 1
pages: 18--30
month: Spring
year: 1995
CODEN: ISCEE4
ISSN: 1070-9924 (print), 1558-190X (electronic) OR 10709924 (print), 1558190X (electronic)
ISSNL: 1070-9924 OR 10709924
bibdate: Sat Jan 9 08:57:23 MST 1999
bibtimestamp: 1999.01.09 08:57:23 MST
URL: http://www.computer.org/cse/cs1998/c1018abs.htm
fjournal: IEEE Computational Science & Engineering
acknowledgement: ack-nhfb
affiliation: Vitesse Semicond. Corp., Camarillo, CA, USA
classcodes: C5130 (Microprocessor chips); C5230 (Digital arithmetic methods)
corpsource: Vitesse Semicond. Corp., Camarillo, CA, USA
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=99
thesaurus: Floating point arithmetic; Microprocessor chips
treatment: P Practical; T Theoretical or Mathematical
rawauthor: Tim Coe and Terje Mathisen and Cleve Moler and Vaughan Pratt
rawtitle: Computational Aspects of the {Pentium} Affair
bibsource:
https://www.math.utah.edu/pub/bibnet/authors/m/moler-cleve-b.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib

abstract:
The Pentium affair has been widely publicized. It started with an obscure defect in the floating-point unit of Intel Corporation's flagship Pentium microprocessor. This is the story of how the Pentium floating-point division problem was discovered, and what you need to know about the maths and computer engineering involved before deciding whether to replace the chip, install the workaround provided here, or do nothing. The paper also discusses broader issues of computational correctness.

keywords:
computational aspects; computational correctness; computer engineering; division problem; floating point arithmetic; Floating-point division problem; floating-point unit; Intel Corporation; microprocessor chips; Pentium affair; Pentium microprocessor

rawabstract:
The Pentium affair has been widely publicized. It started with an obscure defect in the floating-point unit of Intel Corporation's flagship Pentium microprocessor. This is the story of how the Pentium floating-point division problem was discovered, and what you need to know about the maths and computer engineering involved before deciding whether to replace the chip, install the workaround provided here, or do nothing. The paper also discusses broader issues of computational correctness.

entry:
@Article{Coe:1995:CAP,
  author =       "Tim Coe and Terje Mathisen and Cleve Moler and Vaughan
                 Pratt",
  title =        "Computational Aspects of the {Pentium} Affair",
  journal =      j-IEEE-COMPUT-SCI-ENG,
  volume =       "2",
  number =       "1",
  pages =        "18--30",
  month =        "Spring",
  year =         "1995",
  CODEN =        "ISCEE4",
  ISSN =         "1070-9924 (print), 1558-190X (electronic)",
  ISSN-L =       "1070-9924",
  bibdate =      "Sat Jan 9 08:57:23 MST 1999",
  bibsource =    "https://www.math.utah.edu/pub/bibnet/authors/m/moler-cleve-b.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.computer.org/cse/cs1998/c1018abs.htm",
  abstract =     "The Pentium affair has been widely publicized. It
                 started with an obscure defect in the floating-point
                 unit of Intel Corporation's flagship Pentium
                 microprocessor. This is the story of how the Pentium
                 floating-point division problem was discovered, and
                 what you need to know about the maths and computer
                 engineering involved before deciding whether to replace
                 the chip, install the workaround provided here, or do
                 nothing. The paper also discusses broader issues of
                 computational correctness.",
  acknowledgement = ack-nhfb,
  affiliation =  "Vitesse Semicond. Corp., Camarillo, CA, USA",
  classcodes =   "C5130 (Microprocessor chips); C5230 (Digital
                 arithmetic methods)",
  classification = "C5130 (Microprocessor chips); C5230 (Digital
                 arithmetic methods)",
  corpsource =   "Vitesse Semicond. Corp., Camarillo, CA, USA",
  fjournal =     "IEEE Computational Science \& Engineering",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=99",
  keywords =     "computational aspects; computational correctness;
                 computer engineering; division problem; floating point
                 arithmetic; Floating-point division problem;
                 floating-point unit; Intel Corporation; microprocessor
                 chips; Pentium affair; Pentium microprocessor",
  thesaurus =    "Floating point arithmetic; Microprocessor chips",
  treatment =    "P Practical; T Theoretical or Mathematical",
}


bibtype: article
filename: fparith.bib
label: Coe:1995:IPF
author: Tim Coe
title: Inside the Pentium FDIV Bug
journal: j-DDJ
volume: 20
number: 4
pages: 129--??
month: apr
monthnumber: 4
year: 1995
CODEN: DDJOEB
ISSN: 1044-789X OR 1044789X
bibdate: Mon Sep 2 09:09:39 MDT 1996
bibtimestamp: 1996.09.02 09:09:39 MDT
fjournal: Dr. Dobb's Journal of Software Tools
keywords: Intel Pentium divide flaw; Thomas R. Nicely
acknowledgement: ack-nhfb
rawauthor: Tim Coe
rawtitle: Inside the {Pentium FDIV} Bug
bibsource:
http://www.ddj.com/documents/s=992/ddj9504l/; http://www.ddj.com/index/author/index.htm; https://www.math.utah.edu/pub/tex/bib/fparith.bib

entry:
@Article{Coe:1995:IPF,
  author =       "Tim Coe",
  title =        "Inside the {Pentium FDIV} Bug",
  journal =      j-DDJ,
  volume =       "20",
  number =       "4",
  pages =        "129--??",
  month =        apr,
  year =         "1995",
  CODEN =        "DDJOEB",
  ISSN =         "1044-789X",
  bibdate =      "Mon Sep 2 09:09:39 MDT 1996",
  bibsource =    "http://www.ddj.com/documents/s=992/ddj9504l/;
                 http://www.ddj.com/index/author/index.htm;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "Dr. Dobb's Journal of Software Tools",
  keywords =     "Intel Pentium divide flaw; Thomas R. Nicely",
}


bibtype: inproceedings
filename: fparith.bib
label: Coe:1995:ITS
author: Tim Coe and Ping Tak Peter Tang
title: It Takes Six Ones to Reach a Flaw
crossref: Knowles:1995:PSC
pages: 140--148
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
note: Also available as Chinese University of Hong Kong technical report 95-5 (61), 1995.
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Coe.pdf
keywords: ARITH-12; Pentium divide flaw
acknowledgement: ack-nhfb
rawauthor: Tim Coe and Ping Tak Peter Tang
rawnote: Also available as Chinese University of Hong Kong technical report 95-5 (61), 1995.
rawtitle: It Takes Six Ones to Reach a Flaw
entry:
@InProceedings{Coe:1995:ITS,
  author =       "Tim Coe and Ping Tak Peter Tang",
  title =        "It Takes Six Ones to Reach a Flaw",
  crossref =     "Knowles:1995:PSC",
  pages =        "140--148",
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  note =         "Also available as Chinese University of Hong Kong
                 technical report 95-5 (61), 1995.",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Coe.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12; Pentium divide flaw",
}


bibtype: article
filename: fparith.bib
label: Crenshaw:1995:PTFa
author: Jack W. Crenshaw
title: Programmer's Toolbox: Floating-Point Math
journal: j-EMBED-SYS-PROG
volume: 8
number: 11
pages: 25--??
year: 1995
CODEN: EYPRE4
ISSN: 1040-3272 OR 10403272
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
fjournal: Embedded Systems Programming
acknowledgement: ack-nhfb
rawauthor: Jack W. Crenshaw
rawtitle: Programmer's Toolbox: Floating-Point Math
entry:
@Article{Crenshaw:1995:PTFa,
  author =       "Jack W. Crenshaw",
  title =        "Programmer's Toolbox: Floating-Point Math",
  journal =      j-EMBED-SYS-PROG,
  volume =       "8",
  number =       "11",
  pages =        "25--??",
  year =         "1995",
  CODEN =        "EYPRE4",
  ISSN =         "1040-3272",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "Embedded Systems Programming",
}


bibtype: article
filename: fparith.bib
label: Crenshaw:1995:PTFb
author: Jack W. Crenshaw
title: Programmer's Toolbox: Floating-Point Math, Part 2
journal: j-EMBED-SYS-PROG
volume: 8
number: 12
pages: 29--??
year: 1995
CODEN: EYPRE4
ISSN: 1040-3272 OR 10403272
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
fjournal: Embedded Systems Programming
acknowledgement: ack-nhfb
rawauthor: Jack W. Crenshaw
rawtitle: Programmer's Toolbox: Floating-Point Math, Part 2
entry:
@Article{Crenshaw:1995:PTFb,
  author =       "Jack W. Crenshaw",
  title =        "Programmer's Toolbox: Floating-Point Math, Part 2",
  journal =      j-EMBED-SYS-PROG,
  volume =       "8",
  number =       "12",
  pages =        "29--??",
  year =         "1995",
  CODEN =        "EYPRE4",
  ISSN =         "1040-3272",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "Embedded Systems Programming",
}


bibtype: inproceedings
filename: fparith.bib
label: Cui:1995:GIFa
author: S. Cui and N. Burgess and M. Liebelt and K. Eshraghian
title: A 32-bit GaAs IEEE floating point multiplier using Trailing-1's rounding algorithm
crossref: Jain:1995:PET
pages: 246--252
year: 1995
bibdate: Thu Dec 14 11:25:18 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.14 11:25:18 MST
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Jain.pdf
acknowledgement: ack-nhfb
affiliation: Department of Electr. and Electron. Eng., Adelaide University, SA, Australia
rawauthor: S. Cui and N. Burgess and M. Liebelt and K. Eshraghian
rawtitle: A 32-bit {GaAs IEEE} floating point multiplier using {Trailing-1}'s rounding algorithm
abstract:
The paper presents a GaAs 32-bit IEEE floating point multiplier. A modified carry save array is used in conjunction with Booth's algorithm to reduce the partial product addition and interconnection. A special rounding technique called Trailing-1's Predictor is used to speed up the final addition and rounding. This chip uses a new layout methodology for easy design structure and improved GaAs technology layout density. The combination of the fast arithmetic architecture and compact layout style achieves 4ns multiplication time with 3.5 W power dissipation at 75 degrees C. The area is 2.43 mm by 3.77 mm (excluding pads) and uses 28000 transistors to give a density of 3056 transistors/mm/sup 2/ for 0.8 mu m GaAs technology. (11 Refs.)

keywords:
3.5 W; 32 Bit; 32 Bit GaAs IEEE floating point multiplier; 75 DegC; Booth algorithm; Compact layout style; Easy design structure; Fast arithmetic architecture; GaAs technology; Improved GaAs technology layout density; Layout methodology; Modified carry save array; Multiplication time; Partial product addition; Power dissipation; Special rounding technique; Trailing-1s rounding algorithm; Transistors

thesaurus:
Floating point arithmetic; Gallium arsenide; Microprocessor chips; Multiplying circuits; Roundoff errors; Societies

rawabstract:
The paper presents a GaAs 32-bit IEEE floating point multiplier. A modified carry save array is used in conjunction with Booth's algorithm to reduce the partial product addition and interconnection. A special rounding technique called Trailing-1's Predictor is used to speed up the final addition and rounding. This chip uses a new layout methodology for easy design structure and improved GaAs technology layout density. The combination of the fast arithmetic architecture and compact layout style achieves 4ns multiplication time with 3.5 W power dissipation at 75 degrees C. The area is 2.43 mm by 3.77 mm (excluding pads) and uses 28000 transistors to give a density of 3056 transistors/mm/sup 2/ for 0.8 mu m GaAs technology. (11 Refs.)

entry:
@InProceedings{Cui:1995:GIFa,
  author =       "S. Cui and N. Burgess and M. Liebelt and K.
                 Eshraghian",
  title =        "A 32-bit {GaAs IEEE} floating point multiplier using
                 {Trailing-1}'s rounding algorithm",
  crossref =     "Jain:1995:PET",
  pages =        "246--252",
  year =         "1995",
  bibdate =      "Thu Dec 14 11:25:18 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Jain.pdf",
  abstract =     "The paper presents a GaAs 32-bit IEEE floating point
                 multiplier. A modified carry save array is used in
                 conjunction with Booth's algorithm to reduce the
                 partial product addition and interconnection. A special
                 rounding technique called Trailing-1's Predictor is
                 used to speed up the final addition and rounding. This
                 chip uses a new layout methodology for easy design
                 structure and improved GaAs technology layout density.
                 The combination of the fast arithmetic architecture and
                 compact layout style achieves 4ns multiplication time
                 with 3.5 W power dissipation at 75 degrees C. The area
                 is 2.43 mm by 3.77 mm (excluding pads) and uses 28000
                 transistors to give a density of 3056
                 transistors/mm/sup 2/ for 0.8 mu m GaAs technology. (11
                 Refs.)",
  acknowledgement = ack-nhfb,
  affiliation =  "Department of Electr. and Electron. Eng., Adelaide
                 University, SA, Australia",
  classification = "B1265B (Logic circuits); C5120 (Logic and switching
                 circuits); C5130 (Microprocessor chips); C5230 (Digital
                 arithmetic methods)",
  keywords =     "3.5 W; 32 Bit; 32 Bit GaAs IEEE floating point
                 multiplier; 75 DegC; Booth algorithm; Compact layout
                 style; Easy design structure; Fast arithmetic
                 architecture; GaAs technology; Improved GaAs technology
                 layout density; Layout methodology; Modified carry save
                 array; Multiplication time; Partial product addition;
                 Power dissipation; Special rounding technique;
                 Trailing-1s rounding algorithm; Transistors",
  numericalindex = "Word length 3.2E+01 bit; Power 3.5E+00 W;
                 Temperature 3.48E+02 K",
  thesaurus =    "Floating point arithmetic; Gallium arsenide;
                 Microprocessor chips; Multiplying circuits; Roundoff
                 errors; Societies",
}


bibtype: inproceedings
filename: fparith.bib
label: Cui:1995:GIFb
author: S. Cui and N. Burgess and M. Liebelt and K. Eshraghian
title: A GaAs IEEE Floating Point Standard Single Precision Multiplier
crossref: Knowles:1995:PSC
pages: 91--97
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Cui.pdf
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: S. Cui and N. Burgess and M. Liebelt and K. Eshraghian
rawtitle: A {GaAs} {IEEE} Floating Point Standard Single Precision Multiplier
entry:
@InProceedings{Cui:1995:GIFb,
  author =       "S. Cui and N. Burgess and M. Liebelt and K.
                 Eshraghian",
  title =        "A {GaAs} {IEEE} Floating Point Standard Single
                 Precision Multiplier",
  crossref =     "Knowles:1995:PSC",
  pages =        "91--97",
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Cui.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: article
filename: fparith.bib
label: Das:1995:IFC
author: D. Das and K. Mukhopadhyaya and B. P. Sinha
title: Implementation of four common functions on an LNS co-processor
journal: j-IEEE-TRANS-COMPUT
volume: 44
number: 1
pages: 155--161
month: jan
monthnumber: 1
year: 1995
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.367997
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Sat Jul 16 16:14:38 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 16:14:38 MDT
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: D. Das and K. Mukhopadhyaya and B. P. Sinha
rawtitle: Implementation of four common functions on an {LNS} co-processor
entry:
@Article{Das:1995:IFC,
  author =       "D. Das and K. Mukhopadhyaya and B. P. Sinha",
  title =        "Implementation of four common functions on an {LNS}
                 co-processor",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "44",
  number =       "1",
  pages =        "155--161",
  month =        jan,
  year =         "1995",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.367997",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Sat Jul 16 16:14:38 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
  summary =      "We propose a scheme for evaluating four commonly used
                 functions namely, (1) inverse trigonometric functions,
                 (2) trigonometric functions, (3) the exponential
                 function, and (4) the logarithmic function with the
                 help of a logarithmic number system (\ldots{})",
}


bibtype: article
filename: fparith.bib
label: Daumas:1995:MRR
author: Marc Daumas and Christophe Mazenc and Xavier Merrheim and Jean-Michel Muller
journal: j-J-UCS
volume: 1
number: 3
pages: 162--175
day: 28
month: mar
monthnumber: 3
year: 1995
ISSN: 0948-6968 OR 09486968
ISSNL: 0948-6968 OR 09486968
MRclass: 68M07 (65D20 68Q20)
MRnumber: 97b:68012
bibdate: Wed May 28 19:32:35 MDT 1997
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1997.05.28 19:32:35 MDT
URL: http://www.iicm.edu/jucs_1_3/modular_range_reduction
fjournal: J.UCS: Journal of Universal Computer Science
keywords: range reduction
acknowledgement: ack-nhfb
journalURL: http://www.jucs.org/jucs
rawauthor: Marc Daumas and Christophe Mazenc and Xavier Merrheim and Jean-Michel Muller
title:
Modular range reduction: a new algorithm for fast and accurate computation of the elementary functions

rawtitle:
Modular range reduction: a new algorithm for fast and accurate computation of the elementary functions

entry:
@Article{Daumas:1995:MRR,
  author =       "Marc Daumas and Christophe Mazenc and Xavier Merrheim
                 and Jean-Michel Muller",
  title =        "Modular range reduction: a new algorithm for fast and
                 accurate computation of the elementary functions",
  journal =      j-J-UCS,
  volume =       "1",
  number =       "3",
  pages =        "162--175",
  day =          "28",
  month =        mar,
  year =         "1995",
  CODEN =        "????",
  ISSN =         "0948-6968",
  ISSN-L =       "0948-6968",
  MRclass =      "68M07 (65D20 68Q20)",
  MRnumber =     "97b:68012",
  bibdate =      "Wed May 28 19:32:35 MDT 1997",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.iicm.edu/jucs_1_3/modular_range_reduction",
  acknowledgement = ack-nhfb,
  fjournal =     "J.UCS: Journal of Universal Computer Science",
  journal-URL =  "http://www.jucs.org/jucs",
  keywords =     "range reduction",
}


bibtype: article
filename: fparith.bib
label: Demmel:1995:CSB
author: James W. Demmel and Inderjit Dhillon and Huan Ren
journal: j-ELECTRON-TRANS-NUMER-ANAL
volume: 3
pages: 116--149
year: 1995
ISSN: 1068-9613 (print), 1097-4067 (electronic) OR 10689613 (print), 10974067 (electronic)
ISSNL: 1068-9613 OR 10689613
bibdate: Mon Sep 6 12:28:29 MDT 2010
bibsource: http://etna.mcs.kent.edu/; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2010.09.06 12:28:29 MDT
URL: http://etna.mcs.kent.edu/vol.3.1995/pp116-149.dir/pp116-149.pdf
fjournal: Electronic Transactions on Numerical Analysis
acknowledgement: ack-nhfb
journalURL: http://etna.mcs.kent.edu/
rawauthor: James W. Demmel and Inderjit Dhillon and Huan Ren
title:
On the correctness of some bisection-like parallel eigenvalue algorithms in floating point arithmetic

rawtitle:
On the correctness of some bisection-like parallel eigenvalue algorithms in floating point arithmetic

entry:
@Article{Demmel:1995:CSB,
  author =       "James W. Demmel and Inderjit Dhillon and Huan Ren",
  title =        "On the correctness of some bisection-like parallel
                 eigenvalue algorithms in floating point arithmetic",
  journal =      j-ELECTRON-TRANS-NUMER-ANAL,
  volume =       "3",
  pages =        "116--149",
  year =         "1995",
  CODEN =        "????",
  ISSN =         "1068-9613 (print), 1097-4067 (electronic)",
  ISSN-L =       "1068-9613",
  bibdate =      "Mon Sep 6 12:28:29 MDT 2010",
  bibsource =    "http://etna.mcs.kent.edu/;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://etna.mcs.kent.edu/vol.3.1995/pp116-149.dir/pp116-149.pdf",
  acknowledgement = ack-nhfb,
  fjournal =     "Electronic Transactions on Numerical Analysis",
  journal-URL =  "http://etna.mcs.kent.edu/",
}


bibtype: article
filename: fparith.bib
label: DiClaudio:1995:FCR
author: E. D. Di Claudio and F. Piazza and G. Orlandi
title: Fast combinatorial RNS processors for DSP applications
journal: j-IEEE-TRANS-COMPUT
volume: 44
number: 5
pages: 624--633
month: may
monthnumber: 5
year: 1995
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.381948
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Wed Jul 6 08:01:27 MDT 2011
bibtimestamp: 2011.07.06 08:01:27 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=381948
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: E. D. {Di Claudio} and F. Piazza and G. Orlandi
rawtitle: Fast combinatorial {RNS} processors for {DSP} applications
entry:
@Article{DiClaudio:1995:FCR,
  author =       "E. D. {Di Claudio} and F. Piazza and G. Orlandi",
  title =        "Fast combinatorial {RNS} processors for {DSP}
                 applications",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "44",
  number =       "5",
  pages =        "624--633",
  month =        may,
  year =         "1995",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.381948",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Wed Jul 6 08:01:27 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=381948",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: article
filename: fparith.bib
label: Doman:1995:SAP
author: B. G. S. Doman and C. J. Pursglove and W. M. Coen
title: A Set of Ada Packages for High Precision Calculations
journal: j-TOMS
volume: 21
number: 4
pages: 416--431
month: dec
monthnumber: 12
year: 1995
CODEN: ACMSCU
DOI: https://doi.org/10.1145/212066.212087
ISSN: 0098-3500 (print), 1557-7295 (electronic) OR 00983500 (print), 15577295 (electronic)
ISSNL: 0098-3500 OR 00983500
bibdate: Tue Nov 14 09:57:55 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.11.14 09:57:55 ???
URL: http://www.acm.org/pubs/citations/journals/toms/1995-21-4/p416-doman/
fjournal: ACM Transactions on Mathematical Software (TOMS)
acknowledgement: ack-rfb
journalURL: https://dl.acm.org/loi/toms
rawauthor: B. G. S. Doman and C. J. Pursglove and W. M. Coen
rawtitle: A Set of {Ada} Packages for High Precision Calculations
keywords:
accuracy; Ada; arithmetic elementary-function evaluation; floating-point; multiple-precision portable software

subject:
G.1.0 [Numerical Analysis]: General -- computer arithmetic; G.1.2 [Numerical Analysis]: Approximation -- elementary function approximation; G.4 [Mathematics of Computing]: Mathematical Software -- algorithm analysis; efficiency; portability

entry:
@Article{Doman:1995:SAP,
  author =       "B. G. S. Doman and C. J. Pursglove and W. M. Coen",
  title =        "A Set of {Ada} Packages for High Precision
                 Calculations",
  journal =      j-TOMS,
  volume =       "21",
  number =       "4",
  pages =        "416--431",
  month =        dec,
  year =         "1995",
  CODEN =        "ACMSCU",
  DOI =          "https://doi.org/10.1145/212066.212087",
  ISSN =         "0098-3500 (print), 1557-7295 (electronic)",
  ISSN-L =       "0098-3500",
  bibdate =      "Tue Nov 14 09:57:55 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acm.org/pubs/citations/journals/toms/1995-21-4/p416-doman/",
  acknowledgement = ack-rfb,
  fjournal =     "ACM Transactions on Mathematical Software (TOMS)",
  journal-URL =  "https://dl.acm.org/loi/toms",
  keywords =     "accuracy; Ada; arithmetic elementary-function
                 evaluation; floating-point; multiple-precision portable
                 software",
  subject =      "G.1.0 [Numerical Analysis]: General -- computer
                 arithmetic; G.1.2 [Numerical Analysis]: Approximation
                 -- elementary function approximation; G.4 [Mathematics
                 of Computing]: Mathematical Software -- algorithm
                 analysis; efficiency; portability",
}


bibtype: article
filename: fparith.bib
label: Doran:1995:SCD
author: R. W. Doran
title: Special Cases of Division
journal: j-J-UCS
volume: 1
number: 3
pages: 176--194
day: 28
month: mar
monthnumber: 3
year: 1995
ISSN: 0948-6968 OR 09486968
ISSNL: 0948-6968 OR 09486968
MRclass: 68M07 (68Q20)
MRnumber: 97b:68013
bibdate: Wed May 28 19:32:35 MDT 1997
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1997.05.28 19:32:35 MDT
URL: http://www.iicm.edu/jucs_1_3/special_cases_of_division
fjournal: J.UCS: Journal of Universal Computer Science
acknowledgement: ack-nhfb
journalURL: http://www.jucs.org/jucs
rawauthor: R. W. Doran
rawtitle: Special Cases of Division
entry:
@Article{Doran:1995:SCD,
  author =       "R. W. Doran",
  title =        "Special Cases of Division",
  journal =      j-J-UCS,
  volume =       "1",
  number =       "3",
  pages =        "176--194",
  day =          "28",
  month =        mar,
  year =         "1995",
  CODEN =        "????",
  ISSN =         "0948-6968",
  ISSN-L =       "0948-6968",
  MRclass =      "68M07 (68Q20)",
  MRnumber =     "97b:68013",
  bibdate =      "Wed May 28 19:32:35 MDT 1997",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.iicm.edu/jucs_1_3/special_cases_of_division",
  acknowledgement = ack-nhfb,
  fjournal =     "J.UCS: Journal of Universal Computer Science",
  journal-URL =  "http://www.jucs.org/jucs",
}


bibtype: inproceedings
filename: fparith.bib
label: Ercegovac:1995:SDC
author: Milos D. Ercegovac and Tomas Lang
title: Sign Detection and Comparison Networks with a Small Number of Transitions
crossref: Knowles:1995:PSC
pages: 59--66
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Ercegovac.pdf
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: Milo{\v{s}} D. Ercegovac and Tom{\'a}s Lang
rawtitle: Sign Detection and Comparison Networks with a Small Number of Transitions
entry:
@InProceedings{Ercegovac:1995:SDC,
  author =       "Milo{\v{s}} D. Ercegovac and Tom{\'a}s Lang",
  title =        "Sign Detection and Comparison Networks with a Small
                 Number of Transitions",
  crossref =     "Knowles:1995:PSC",
  pages =        "59--66",
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Ercegovac.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: article
filename: fparith.bib
label: Espelid:1995:FPS
author: T. O. Espelid
title: On Floating-Point Summation
journal: j-SIAM-REVIEW
volume: 37
number: 4
pages: 603--607
month: dec
monthnumber: 12
year: 1995
CODEN: SIREAD
DOI: https://doi.org/10.1137/1037130
ISSN: 0036-1445 (print), 1095-7200 (electronic) OR 00361445 (print), 10957200 (electronic)
ISSNL: 0036-1445 OR 00361445
MRclass: 65Gxx (65Bxx)
MRnumber: 1 368 391
bibdate: Sat Mar 29 09:55:35 MDT 2014
bibtimestamp: 2014.03.29 09:55:35 MDT
URL: http://epubs.siam.org/27303.htm
fjournal: SIAM Review
acknowledgement: ack-nhfb
affiliation: Univ of Bergen
affiliationaddress: Bergen, Norway
corpsource: Department of Inf., Bergen University, Norway
journalURL: http://epubs.siam.org/sirev
journalabr: SIAM Rev
onlinedate: December 1995
treatment: T Theoretical or Mathematical
rawauthor: T. O. Espelid
rawtitle: On Floating-Point Summation
bibsource:
Compendex database; http://epubs.siam.org/toc/siread/37/4; http://www.siam.org/journals/sirev/sirev374.htm; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/siamreview.bib

abstract:
In this paper we focus on some general error analysis results in floating-point summation. We emphasize analysis that is useful from both a scientific and a teaching point of view.

keywords:
accurate floating-point summation; algorithm sum; algorithms; binary summation tree; digital arithmetic; error analysis; floating-point arithmetic; floating-point summation; number theory; numerical analysis; ordering; root of the tree; rounding errors; roundoff errors; set theory; trees (mathematics)

rawabstract:
In this paper we focus on some general error analysis results in floating-point summation. We emphasize analysis that is useful from both a scientific and a teaching point of view.

entry:
@Article{Espelid:1995:FPS,
  author =       "T. O. Espelid",
  title =        "On Floating-Point Summation",
  journal =      j-SIAM-REVIEW,
  volume =       "37",
  number =       "4",
  pages =        "603--607",
  month =        dec,
  year =         "1995",
  CODEN =        "SIREAD",
  DOI =          "https://doi.org/10.1137/1037130",
  ISSN =         "0036-1445 (print), 1095-7200 (electronic)",
  ISSN-L =       "0036-1445",
  MRclass =      "65Gxx (65Bxx)",
  MRnumber =     "1 368 391",
  bibdate =      "Sat Mar 29 09:55:35 MDT 2014",
  bibsource =    "Compendex database;
                 http://epubs.siam.org/toc/siread/37/4;
                 http://www.siam.org/journals/sirev/sirev374.htm;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/siamreview.bib",
  URL =          "http://epubs.siam.org/27303.htm",
  abstract =     "In this paper we focus on some general error analysis
                 results in floating-point summation. We emphasize
                 analysis that is useful from both a scientific and a
                 teaching point of view.",
  acknowledgement = ack-nhfb,
  affiliation =  "Univ of Bergen",
  affiliationaddress = "Bergen, Norway",
  classification = "721.1; 921.4; 921.6; C4110 (Error analysis in
                 numerical methods); C5230 (Digital arithmetic
                 methods)",
  corpsource =   "Department of Inf., Bergen University, Norway",
  fjournal =     "SIAM Review",
  journal-URL =  "http://epubs.siam.org/sirev",
  journalabr =   "SIAM Rev",
  keywords =     "accurate floating-point summation; algorithm sum;
                 algorithms; binary summation tree; digital arithmetic;
                 error analysis; floating-point arithmetic;
                 floating-point summation; number theory; numerical
                 analysis; ordering; root of the tree; rounding errors;
                 roundoff errors; set theory; trees (mathematics)",
  onlinedate =   "December 1995",
  treatment =    "T Theoretical or Mathematical",
}


bibtype: article
filename: fparith.bib
label: Fateman:1995:FFP
author: Richard J. Fateman and Kevin A. Broughan and Diane K. Willcock and Duane Rettig
title: Fast Floating Point Processing in Common Lisp
journal: j-TOMS
volume: 21
number: 1
pages: 26--62
month: mar
monthnumber: 3
year: 1995
CODEN: ACMSCU
DOI: https://doi.org/10.1145/200979.200989
ISSN: 0098-3500 (print), 1557-7295 (electronic) OR 00983500 (print), 15577295 (electronic)
ISSNL: 0098-3500 OR 00983500
bibdate: Tue Mar 09 10:20:50 1999
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1999.03.09 10:20:50 ???
note: See remark cite Reid:1996:RFF.
URL: http://www.acm.org/pubs/citations/journals/toms/1995-21-1/p26-fateman/
fjournal: ACM Transactions on Mathematical Software (TOMS)
acknowledgement: ack-nhfb
journalURL: https://dl.acm.org/loi/toms
rawauthor: Richard J. Fateman and Kevin A. Broughan and Diane K. Willcock and Duane Rettig
rawnote: See remark \cite{Reid:1996:RFF}.
rawtitle: Fast Floating Point Processing in {Common Lisp}
keywords:
C programming language; Common Lisp; compiler optimization; floating-point arithmetic; Fortran; Lisp; numerical algorithms; symbolic computation

subject:
D.3.4 [Programming Languages]: Processors --- compilers; interpreters; optimization; G.4 [Mathematics of Computing]: Mathematical Software --- efficiency; portability

entry:
@Article{Fateman:1995:FFP,
  author =       "Richard J. Fateman and Kevin A. Broughan and Diane K.
                 Willcock and Duane Rettig",
  title =        "Fast Floating Point Processing in {Common Lisp}",
  journal =      j-TOMS,
  volume =       "21",
  number =       "1",
  pages =        "26--62",
  month =        mar,
  year =         "1995",
  CODEN =        "ACMSCU",
  DOI =          "https://doi.org/10.1145/200979.200989",
  ISSN =         "0098-3500 (print), 1557-7295 (electronic)",
  ISSN-L =       "0098-3500",
  bibdate =      "Tue Mar 09 10:20:50 1999",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "See remark \cite{Reid:1996:RFF}.",
  URL =          "http://www.acm.org/pubs/citations/journals/toms/1995-21-1/p26-fateman/",
  acknowledgement = ack-nhfb # " and " # ack-rfb,
  fjournal =     "ACM Transactions on Mathematical Software (TOMS)",
  journal-URL =  "https://dl.acm.org/loi/toms",
  keywords =     "C programming language; Common Lisp; compiler
                 optimization; floating-point arithmetic; Fortran; Lisp;
                 numerical algorithms; symbolic computation",
  subject =      "D.3.4 [Programming Languages]: Processors ---
                 compilers; interpreters; optimization; G.4 [Mathematics
                 of Computing]: Mathematical Software --- efficiency;
                 portability",
}


bibtype: inproceedings
filename: fparith.bib
label: Ferguson:1995:ECS
author: Warren E. Ferguson, Jr.
title: Exact Computation of a Sum or Difference with Applications to Argument Reduction
crossref: Knowles:1995:PSC
pages: 216--221
year: 1995
DOI: https://doi.org/10.1109/ARITH.1995.465355
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Ferguson.pdf
keywords: accurate floating-point summation; ARITH-12; range reduction
acknowledgement: ack-nhfb
rawauthor: Warren E. {Ferguson, Jr.}
rawtitle: Exact Computation of a Sum or Difference with Applications to Argument Reduction
abstract:
Results are presented that identify when the computed value of a sum or difference is exact. The accuracy of an argument reduction algorithm is analyzed using these results. This analysis demonstrates that catastrophic cancellation does not occur in this algorithm's computation of the reduced argument.

rawabstract:
Results are presented that identify when the computed value of a sum or difference is exact. The accuracy of an argument reduction algorithm is analyzed using these results. This analysis demonstrates that catastrophic cancellation does not occur in this algorithm's computation of the reduced argument.

entry:
@InProceedings{Ferguson:1995:ECS,
  author =       "Warren E. {Ferguson, Jr.}",
  title =        "Exact Computation of a Sum or Difference with
                 Applications to Argument Reduction",
  crossref =     "Knowles:1995:PSC",
  pages =        "216--221",
  year =         "1995",
  DOI =          "https://doi.org/10.1109/ARITH.1995.465355",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Ferguson.pdf",
  abstract =     "Results are presented that identify when the computed
                 value of a sum or difference is exact. The accuracy of
                 an argument reduction algorithm is analyzed using these
                 results. This analysis demonstrates that catastrophic
                 cancellation does not occur in this algorithm's
                 computation of the reduced argument.",
  acknowledgement = ack-nhfb,
  keywords =     "accurate floating-point summation; ARITH-12; range
                 reduction",
}


bibtype: article
filename: fparith.bib
label: Figueroa:1995:WDR
author: Samuel A. Figueroa
title: When is Double Rounding Innocuous?
journal: j-SIGNUM
volume: 30
number: 3
pages: 21--26
month: jul
monthnumber: 7
year: 1995
CODEN: SNEWD6
DOI: https://doi.org/10.1145/221332.221334
ISSN: 0163-5778 (print), 1558-0237 (electronic) OR 01635778 (print), 15580237 (electronic)
ISSNL: 0163-5778 OR 01635778
bibdate: Tue Apr 12 07:50:26 MDT 2005
bibsource: http://portal.acm.org/; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.04.12 07:50:26 MDT
URL: http://www.cs.nyu.edu/csweb/Research/Theses/figueroa_sam.pdf
fjournal: ACM SIGNUM Newsletter
acknowledgement: ack-nhfb
journalURL: https://dl.acm.org/loi/signum
rawauthor: Samuel A. Figueroa
rawtitle: When is Double Rounding Innocuous?
abstract:
Double rounding is the phenomenon that occurs when the result of an operation is rounded to fit some intermediate destination, and then again when delivered to its final destination. This can be a common occurrence when using some floating-point arithmetic engines which lack single precision registers: results of operations are typically rounded to fit in a register, whose width may be double precision or wider, before being stored in some memory location possibly in a format narrower than that of the registers. Examples of such floating-point arithmetic engines include Intel's x87 series and IBM's POWER architecture. (Implementations of the latter are found in some IBM workstations.)

rawabstract:
Double rounding is the phenomenon that occurs when the result of an operation is rounded to fit some intermediate destination, and then again when delivered to its final destination. This can be a common occurrence when using some floating-point arithmetic engines which lack single precision registers: results of operations are typically rounded to fit in a register, whose width may be double precision or wider, before being stored in some memory location possibly in a format narrower than that of the registers. Examples of such floating-point arithmetic engines include Intel's x87 series and IBM's POWER architecture. (Implementations of the latter are found in some IBM workstations.)

entry:
@Article{Figueroa:1995:WDR,
  author =       "Samuel A. Figueroa",
  title =        "When is Double Rounding Innocuous?",
  journal =      j-SIGNUM,
  volume =       "30",
  number =       "3",
  pages =        "21--26",
  month =        jul,
  year =         "1995",
  CODEN =        "SNEWD6",
  DOI =          "https://doi.org/10.1145/221332.221334",
  ISSN =         "0163-5778 (print), 1558-0237 (electronic)",
  ISSN-L =       "0163-5778",
  bibdate =      "Tue Apr 12 07:50:26 MDT 2005",
  bibsource =    "http://portal.acm.org/;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.cs.nyu.edu/csweb/Research/Theses/figueroa_sam.pdf",
  abstract =     "Double rounding is the phenomenon that occurs when the
                 result of an operation is rounded to fit some
                 intermediate destination, and then again when delivered
                 to its final destination. This can be a common
                 occurrence when using some floating-point arithmetic
                 engines which lack single precision registers: results
                 of operations are typically rounded to fit in a
                 register, whose width may be double precision or wider,
                 before being stored in some memory location possibly in
                 a format narrower than that of the registers. Examples
                 of such floating-point arithmetic engines include
                 Intel's x87 series and IBM's POWER architecture.
                 (Implementations of the latter are found in some IBM
                 workstations.)",
  acknowledgement = ack-nhfb,
  fjournal =     "ACM SIGNUM Newsletter",
  journal-URL =  "https://dl.acm.org/loi/signum",
}


bibtype: techreport
filename: fparith.bib
label: Flynn:1995:ADA
author: Michael J. Flynn and Stuart F. Oberman
title: An analysis of division algorithms and implementations
type: Report
number: CSL-TR-95-675
institution: Stanford University
address: Stanford, CA, USA
pages: 58
month: jul
monthnumber: 7
year: 1995
bibdate: Wed Dec 13 08:55:25 2023
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2023.12.13 08:55:25 ???
URL: https://searchworks.stanford.edu/view/4639530
acknowledgement: ack-nhfb
rawauthor: Michael J. Flynn and Stuart F. Oberman
rawtitle: An analysis of division algorithms and implementations
abstract:
Floating-point division is generally regarded as a low frequency, high latency operation in typical floating-point applications. However, the increasing emphasis on high performance graphics and the industry-wide usage of performance benchmarks forces processor designers to pay close attention to all aspects of floating-point computation. Many algorithms are suitable for implementing division in hardware. This paper presents four major classes of algorithms in a unified framework, namely digit recurrence, functional iteration, very high radix, and variable latency. Digit recurrence algorithms, the most common of which is SRT, use subtraction as the fundamental operator, and they converge to a quotient linearly. Division by functional iteration converges to a quotient quadratically using multiplication. Very high radix division algorithms are similar to digit recurrence algorithms, but they incorporate multiplication to reduce the latency. Variable latency division algorithms reduce the average latency to form the quotient. These algorithms are explained and compared in this work. It is found that for low-cost implementations where chip area must be minimized, digit recurrence algorithms are suitable. An implementation of division by functional iteration can provide the lowest latency for typical multiplier latencies. Variable latency algorithms show promise for simultaneously minimizing average latency while also minimizing area.

rawabstract:
Floating-point division is generally regarded as a low frequency, high latency operation in typical floating-point applications. However, the increasing emphasis on high performance graphics and the industry-wide usage of performance benchmarks forces processor designers to pay close attention to all aspects of floating-point computation. Many algorithms are suitable for implementing division in hardware. This paper presents four major classes of algorithms in a unified framework, namely digit recurrence, functional iteration, very high radix, and variable latency. Digit recurrence algorithms, the most common of which is SRT, use subtraction as the fundamental operator, and they converge to a quotient linearly. Division by functional iteration converges to a quotient quadratically using multiplication. Very high radix division algorithms are similar to digit recurrence algorithms, but they incorporate multiplication to reduce the latency. Variable latency division algorithms reduce the average latency to form the quotient. These algorithms are explained and compared in this work. It is found that for low-cost implementations where chip area must be minimized, digit recurrence algorithms are suitable. An implementation of division by functional iteration can provide the lowest latency for typical multiplier latencies. Variable latency algorithms show promise for simultaneously minimizing average latency while also minimizing area.

entry:
@TechReport{Flynn:1995:ADA,
  author =       "Michael J. Flynn and Stuart F. Oberman",
  title =        "An analysis of division algorithms and
                 implementations",
  type =         "Report",
  number =       "CSL-TR-95-675",
  institution =  "Stanford University",
  address =      "Stanford, CA, USA",
  pages =        "58",
  month =        jul,
  year =         "1995",
  bibdate =      "Wed Dec 13 08:55:25 2023",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "https://searchworks.stanford.edu/view/4639530",
  abstract =     "Floating-point division is generally regarded as a low
                 frequency, high latency operation in typical
                 floating-point applications. However, the increasing
                 emphasis on high performance graphics and the
                 industry-wide usage of performance benchmarks forces
                 processor designers to pay close attention to all
                 aspects of floating-point computation. Many algorithms
                 are suitable for implementing division in hardware.
                 This paper presents four major classes of algorithms in
                 a unified framework, namely digit recurrence,
                 functional iteration, very high radix, and variable
                 latency. Digit recurrence algorithms, the most common
                 of which is SRT, use subtraction as the fundamental
                 operator, and they converge to a quotient linearly.
                 Division by functional iteration converges to a
                 quotient quadratically using multiplication. Very high
                 radix division algorithms are similar to digit
                 recurrence algorithms, but they incorporate
                 multiplication to reduce the latency. Variable latency
                 division algorithms reduce the average latency to form
                 the quotient. These algorithms are explained and
                 compared in this work. It is found that for low-cost
                 implementations where chip area must be minimized,
                 digit recurrence algorithms are suitable. An
                 implementation of division by functional iteration can
                 provide the lowest latency for typical multiplier
                 latencies. Variable latency algorithms show promise for
                 simultaneously minimizing average latency while also
                 minimizing area.",
  acknowledgement = ack-nhfb,
}


bibtype: inproceedings
filename: fparith.bib
label: Flynn:1995:SPT
author: M. J. Flynn and K. Nowka and G. Bewick and E. Schwarz and N. Quach
title: The SNAP Project: Towards Sub-Nanosecond Arithmetic
crossref: Knowles:1995:PSC
pages: 75--83
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: M. J. Flynn and K. Nowka and G. Bewick and E. Schwarz and N. Quach
rawtitle: The {SNAP} Project: Towards Sub-Nanosecond Arithmetic
URL:
ftp://arith.stanford.edu/tr/snap_arith12.ps.Z; http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Flynn.pdf

entry:
@InProceedings{Flynn:1995:SPT,
  author =       "M. J. Flynn and K. Nowka and G. Bewick and E. Schwarz
                 and N. Quach",
  title =        "The {SNAP} Project: Towards Sub-Nanosecond
                 Arithmetic",
  crossref =     "Knowles:1995:PSC",
  pages =        "75--83",
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "ftp://arith.stanford.edu/tr/snap_arith12.ps.Z;
                 http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Flynn.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: article
filename: fparith.bib
label: Fried:1995:PON
author: Stephen S. Fried
title: Pentium Optimizations and Numeric Performance
journal: j-DDJ
volume: 20
number: 1
pages: 18--20, 22, 26--29
month: jan
monthnumber: 1
year: 1995
CODEN: DDJOEB
ISSN: 1044-789X OR 1044789X
bibdate: Thu Sep 05 07:21:01 1996
bibtimestamp: 1996.09.05 07:21:01 ???
fjournal: Dr. Dobb's Journal of Software Tools
acknowledgement: ack-nhfb
affiliation: Microway, Kingston, MA, USA
rawauthor: Stephen S. Fried
rawtitle: {Pentium} Optimizations and Numeric Performance
abstract:
The Pentium is the first member of the Intel x86 family that requires RISC-style instruction scheduling to achieve its full potential. Steve analyzes what this means in terms of Pentium floating-point performance and how you can get full throughput from a Pentium.

keywords:
Compilers; Floating-point performance; Full throughput; Intel x86 family; Numeric performance; Optimizations; Pentium; RISC-style instruction scheduling; Tools

thesaurus:
Floating point arithmetic; Microprocessor chips; Optimisation; Performance evaluation; Program compilers; Reduced instruction set computing

rawabstract:
The Pentium is the first member of the Intel x86 family that requires RISC-style instruction scheduling to achieve its full potential. Steve analyzes what this means in terms of Pentium floating-point performance and how you can get full throughput from a Pentium.

entry:
@Article{Fried:1995:PON,
  author =       "Stephen S. Fried",
  title =        "{Pentium} Optimizations and Numeric Performance",
  journal =      j-DDJ,
  volume =       "20",
  number =       "1",
  pages =        "18--20, 22, 26--29",
  month =        jan,
  year =         "1995",
  CODEN =        "DDJOEB",
  ISSN =         "1044-789X",
  bibdate =      "Thu Sep 05 07:21:01 1996",
  bibsource =    "http://www.ddj.com/index/author/index.htm;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 UnCover database",
  abstract =     "The Pentium is the first member of the Intel x86
                 family that requires RISC-style instruction scheduling
                 to achieve its full potential. Steve analyzes what this
                 means in terms of Pentium floating-point performance
                 and how you can get full throughput from a Pentium.",
  acknowledgement = ack-nhfb,
  affiliation =  "Microway, Kingston, MA, USA",
  classification = "C5130 (Microprocessor chips); C5230 (Digital
                 arithmetic methods); C5470 (Performance evaluation and
                 testing); C6150C (Compilers, interpreters and other
                 processors)",
  fjournal =     "Dr. Dobb's Journal of Software Tools",
  keywords =     "Compilers; Floating-point performance; Full
                 throughput; Intel x86 family; Numeric performance;
                 Optimizations; Pentium; RISC-style instruction
                 scheduling; Tools",
  thesaurus =    "Floating point arithmetic; Microprocessor chips;
                 Optimisation; Performance evaluation; Program
                 compilers; Reduced instruction set computing",
}


bibtype: phdthesis
filename: fparith.bib
label: Gluss:1995:DIA
author: Robert Joseph Gluss
title: Design and implementation of an asynchronous radix-$4$ pre-scaling floating-point divider
type: Thesis (M.S.)
school: Department of Electrical and Computer Engineering, University of California, Davis
address: Davis, CA, USA
pages: 18--20, 22, 26--29
year: 1995
LCCN: LD781.D5j 1995 G587
bibdate: Thu Oct 24 14:19:35 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2002.10.24 14:19:35 MDT
keywords: dissertations, academic -- University of California, Davis -- Electrical and Computer Engineering
acknowledgement: ack-nhfb
rawauthor: Robert Joseph Gluss
rawtitle: Design and implementation of an asynchronous radix-$4$ pre-scaling floating-point divider
entry:
@PhdThesis{Gluss:1995:DIA,
  author =       "Robert Joseph Gluss",
  title =        "Design and implementation of an asynchronous radix-$4$
                 pre-scaling floating-point divider",
  type =         "Thesis ({M.S.})",
  school =       "Department of Electrical and Computer Engineering,
                 University of California, Davis",
  address =      "Davis, CA, USA",
  year =         "1995",
  LCCN =         "LD781.D5j 1995 G587",
  bibdate =      "Thu Oct 24 14:19:35 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "dissertations, academic -- University of California,
                 Davis -- Electrical and Computer Engineering",
}


bibtype: inproceedings
filename: fparith.bib
label: Greenley:1995:UNG
title: UltraSPARC: the next generation superscalar 64-bit SPARC
crossref: IEEE:1995:DPC
pages: 442--451
month: mar
monthnumber: 3
year: 1995
DOI: https://doi.org/10.1109/CMPCON.1995.512421
bibdate: Thu Apr 2 08:38:35 1998
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1998.04.02 08:38:35 ???
acknowledgement: ack-sfo
rawtitle: {UltraSPARC}: the next generation superscalar 64-bit {SPARC}
author:
D. Greenley and J. Bauman and D. Chang and Dennis Chen and R. Eltejaein and P. Ferolito and P. Fu and Robert B. Garner and D. Greenhill and H. Grewal and Kalon Holdbrook and B. Kim and Leslie Kohn and H. Kwan and M. Levitt and Guillermo Maturana and D. Mrazek and Chitresh Narasimhaiah and Kevin Normoyle and N. Parveen and P. Patel and A. Prabhu and Marc Tremblay and Michelle Wong and L. Yang and Krishna Yarlagadda and Robert K. Yu and Robert Yung and Gregory B. Zyner

abstract:
UltraSPARC is the first microprocessor from Sun Microsystems' SPARC Technology Business to implement the new 64-bit SPARC V9 architecture. ULtraSPARC is equipped with unique multimedia capabilities and is capable of 4-way superscalar instruction dispatch, with an emphasis on maximal system efficiency and throughput in the execution of complex, memory-intensive applications. UltraSPARC maintains a strict binary compatibility with the thousands of existing 32-bit applications developed for other SPARC processors. This paper describes the feature set and operation of UltraSPARC.

rawabstract:
UltraSPARC is the first microprocessor from Sun Microsystems' SPARC Technology Business to implement the new 64-bit SPARC V9 architecture. ULtraSPARC is equipped with unique multimedia capabilities and is capable of 4-way superscalar instruction dispatch, with an emphasis on maximal system efficiency and throughput in the execution of complex, memory-intensive applications. UltraSPARC maintains a strict binary compatibility with the thousands of existing 32-bit applications developed for other SPARC processors. This paper describes the feature set and operation of UltraSPARC.

rawauthor:
D. Greenley and J. Bauman and D. Chang and Dennis Chen and R. Eltejaein and P. Ferolito and P. Fu and Robert B. Garner and D. Greenhill and H. Grewal and Kalon Holdbrook and B. Kim and Leslie Kohn and H. Kwan and M. Levitt and Guillermo Maturana and D. Mrazek and Chitresh Narasimhaiah and Kevin Normoyle and N. Parveen and P. Patel and A. Prabhu and Marc Tremblay and Michelle Wong and L. Yang and Krishna Yarlagadda and Robert K. Yu and Robert Yung and Gregory B. Zyner

entry:
@InProceedings{Greenley:1995:UNG,
  author =       "D. Greenley and J. Bauman and D. Chang and Dennis Chen
                 and R. Eltejaein and P. Ferolito and P. Fu and Robert
                 B. Garner and D. Greenhill and H. Grewal and Kalon
                 Holdbrook and B. Kim and Leslie Kohn and H. Kwan and M.
                 Levitt and Guillermo Maturana and D. Mrazek and
                 Chitresh Narasimhaiah and Kevin Normoyle and N. Parveen
                 and P. Patel and A. Prabhu and Marc Tremblay and
                 Michelle Wong and L. Yang and Krishna Yarlagadda and
                 Robert K. Yu and Robert Yung and Gregory B. Zyner",
  title =        "{UltraSPARC}: the next generation superscalar 64-bit
                 {SPARC}",
  crossref =     "IEEE:1995:DPC",
  pages =        "442--451",
  month =        mar,
  year =         "1995",
  DOI =          "https://doi.org/10.1109/CMPCON.1995.512421",
  bibdate =      "Thu Apr 2 08:38:35 1998",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "UltraSPARC is the first microprocessor from Sun
                 Microsystems' SPARC Technology Business to implement
                 the new 64-bit SPARC V9 architecture. ULtraSPARC is
                 equipped with unique multimedia capabilities and is
                 capable of 4-way superscalar instruction dispatch, with
                 an emphasis on maximal system efficiency and throughput
                 in the execution of complex, memory-intensive
                 applications. UltraSPARC maintains a strict binary
                 compatibility with the thousands of existing 32-bit
                 applications developed for other SPARC processors. This
                 paper describes the feature set and operation of
                 UltraSPARC.",
  acknowledgement = ack-sfo # " and " # ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Halfhill:1995:TBP
author: Tom R. Halfhill
journal: j-BYTE
volume: 20
number: 3
pages: 163--??
month: mar
monthnumber: 3
year: 1995
CODEN: BYTEDJ
ISSN: 0360-5280 (print), 1082-7838 (electronic) OR 03605280 (print), 10827838 (electronic)
ISSNL: 0360-5280 OR 03605280
bibdate: Tue Jan 2 10:01:41 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.01.02 10:01:41 MST
fjournal: BYTE Magazine
acknowledgement: ack-nhfb
rawauthor: Tom R. Halfhill
title:
The Truth Behind the Pentium Bug: How often do the five empty cells in the Pentium's FPU lookup table spell miscalculation?

rawtitle:
The Truth Behind the {Pentium} Bug: How often do the five empty cells in the {Pentium}'s {FPU} lookup table spell miscalculation?

entry:
@Article{Halfhill:1995:TBP,
  author =       "Tom R. Halfhill",
  title =        "The Truth Behind the {Pentium} Bug: How often do the
                 five empty cells in the {Pentium}'s {FPU} lookup table
                 spell miscalculation?",
  journal =      j-BYTE,
  volume =       "20",
  number =       "3",
  pages =        "163--??",
  month =        mar,
  year =         "1995",
  CODEN =        "BYTEDJ",
  ISSN =         "0360-5280 (print), 1082-7838 (electronic)",
  ISSN-L =       "0360-5280",
  bibdate =      "Tue Jan 2 10:01:41 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "BYTE Magazine",
}


bibtype: inproceedings
filename: fparith.bib
label: Hamano:1995:DCA
author: Takafumi Hamano and Naofumi Takagi and Shuzo Yajima and Franco P. Preparata
title: $ O(n) $-Depth Circuit Algorithm for Modular Exponentiation
crossref: Knowles:1995:PSC
pages: 188--192
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Hamano.pdf
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: Takafumi Hamano and Naofumi Takagi and Shuzo Yajima and Franco P. Preparata
rawtitle: {$ O(n) $}-Depth Circuit Algorithm for Modular Exponentiation
entry:
@InProceedings{Hamano:1995:DCA,
  author =       "Takafumi Hamano and Naofumi Takagi and Shuzo Yajima
                 and Franco P. Preparata",
  title =        "{$ O(n) $}-Depth Circuit Algorithm for Modular
                 Exponentiation",
  crossref =     "Knowles:1995:PSC",
  pages =        "188--192",
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Hamano.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: article
filename: fparith.bib
label: Harrison:1995:FPV
author: J. Harrison
title: Floating Point Verification in HOL
journal: j-LECT-NOTES-COMP-SCI
number: 971
pages: 186--??
year: 1995
CODEN: LNCSD9
ISSN: 0302-9743 (print), 1611-3349 (electronic) OR 03029743 (print), 16113349 (electronic)
ISSNL: 0302-9743 OR 03029743
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
fjournal: Lecture Notes in Computer Science
acknowledgement: ack-nhfb
journalURL: http://link.springer.com/bookseries/558
rawauthor: J. Harrison
rawtitle: Floating Point Verification in {HOL}
entry:
@Article{Harrison:1995:FPV,
  author =       "J. Harrison",
  title =        "Floating Point Verification in {HOL}",
  journal =      j-LECT-NOTES-COMP-SCI,
  volume =       "??",
  number =       "971",
  pages =        "186--??",
  year =         "1995",
  CODEN =        "LNCSD9",
  ISSN =         "0302-9743 (print), 1611-3349 (electronic)",
  ISSN-L =       "0302-9743",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "Lecture Notes in Computer Science",
  journal-URL =  "http://link.springer.com/bookseries/558",
}


bibtype: inproceedings
filename: fparith.bib
label: Hassler:1995:FET
author: Hannes Hassler and Naofumi Takagi
title: Function Evaluation by Table Look-up and Addition
crossref: Knowles:1995:PSC
pages: 10--16
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Hassler.pdf
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: Hannes Hassler and Naofumi Takagi
rawtitle: Function Evaluation by Table Look-up and Addition
entry:
@InProceedings{Hassler:1995:FET,
  author =       "Hannes Hassler and Naofumi Takagi",
  title =        "Function Evaluation by Table Look-up and Addition",
  crossref =     "Knowles:1995:PSC",
  pages =        "10--16",
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Hassler.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: techreport
filename: fparith.bib
label: Hauser:1995:HFE
author: John R. Hauser
title: Handling floating-point exceptions in numeric programs
type: Report
number: UCB/CSD 95-870
institution: Computer Science Division (EECS), University of California
address: Berkeley, CA, USA
pages: 31
month: mar
monthnumber: 3
year: 1995
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
acknowledgement: ack-nhfb
rawauthor: John R. Hauser
rawtitle: Handling floating-point exceptions in numeric programs
entry:
@TechReport{Hauser:1995:HFE,
  author =       "John R. Hauser",
  title =        "Handling floating-point exceptions in numeric
                 programs",
  type =         "Report",
  number =       "UCB/CSD 95-870",
  institution =  "Computer Science Division (EECS), University of
                 California",
  address =      "Berkeley, CA, USA",
  pages =        "31",
  month =        mar,
  year =         "1995",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
}


bibtype: mastersthesis
filename: fparith.bib
label: Helsley:1995:SZL
author: Harold David Helsley
title: A study of zero-input limit cycles in floating-point digital signal processors
type: Thesis (M.S.)
school: University of Tennessee, Knoxville
address: Knoxville, TN, USA
pages: vii + 65
year: 1995
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
keywords: Limit cycles.; Signal processing --- Digital techniques.
acknowledgement: ack-nhfb
rawauthor: Harold David Helsley
rawtitle: A study of zero-input limit cycles in floating-point digital signal processors
entry:
@MastersThesis{Helsley:1995:SZL,
  author =       "Harold David Helsley",
  title =        "A study of zero-input limit cycles in floating-point
                 digital signal processors",
  type =         "Thesis ({M.S.})",
  school =       "University of Tennessee, Knoxville",
  address =      "Knoxville, TN, USA",
  pages =        "vii + 65",
  year =         "1995",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Limit cycles.; Signal processing --- Digital
                 techniques.",
}


bibtype: inproceedings
filename: fparith.bib
label: Hiasat:1995:HSDa
author: A. A. Hiasat and H. S. Abdel-Aty-Zohdy
booktitle: IEEE International Symposium on Circuits and Systems, ISCAS '95, 3 May 1995
title: A high-speed division algorithm for residue number system
volume: 3
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1996--1999
year: 1995
DOI: https://doi.org/10.1109/ISCAS.1995.523813
bibdate: Fri Nov 9 11:38:58 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:58 MST
keywords: residue arithmetic; residue number system
acknowledgement: ack-nhfb
rawauthor: A. A. Hiasat and H. S. Abdel-Aty-Zohdy
rawbooktitle: {IEEE} International Symposium on Circuits and Systems, {ISCAS '95}, 3 May 1995
rawtitle: A high-speed division algorithm for residue number system
entry:
@InProceedings{Hiasat:1995:HSDa,
  author =       "A. A. Hiasat and H. S. Abdel-Aty-Zohdy",
  booktitle =    "{IEEE} International Symposium on Circuits and
                 Systems, {ISCAS '95}, 3 May 1995",
  title =        "A high-speed division algorithm for residue number
                 system",
  volume =       "3",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1996--1999",
  year =         "1995",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1109/ISCAS.1995.523813",
  ISSN =         "????",
  bibdate =      "Fri Nov 9 11:38:58 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "residue arithmetic; residue number system",
  summary =      "A new algorithm for one of the longstanding problems
                 in residue number system, namely division, is
                 presented. The algorithm is very simple. It approaches
                 the paper-and-pencil division procedure where the
                 quotient is selected to guarantee a non- \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Hiasat:1995:HSDb
author: A. A. Hiasat and H. S. Abdel-Aty-Zohdy
booktitle: IEEE International Symposium on Circuits and Systems, ISCAS '95, 3 May 1995
title: A high-speed division algorithm for residue number system
volume: 3
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1996--1999
year: 1995
DOI: https://doi.org/10.1109/ISCAS.1995.523813
bibdate: Fri Nov 9 11:38:58 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:58 MST
keywords: residue arithmetic; residue number system
acknowledgement: ack-nhfb
rawauthor: A. A. Hiasat and H. S. Abdel-Aty-Zohdy
rawbooktitle: {IEEE} International Symposium on Circuits and Systems, {ISCAS '95}, 3 May 1995
rawtitle: A high-speed division algorithm for residue number system
entry:
@InProceedings{Hiasat:1995:HSDb,
  author =       "A. A. Hiasat and H. S. Abdel-Aty-Zohdy",
  booktitle =    "{IEEE} International Symposium on Circuits and
                 Systems, {ISCAS '95}, 3 May 1995",
  title =        "A high-speed division algorithm for residue number
                 system",
  volume =       "3",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1996--1999",
  year =         "1995",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1109/ISCAS.1995.523813",
  ISSN =         "????",
  bibdate =      "Fri Nov 9 11:38:58 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "residue arithmetic; residue number system",
  summary =      "A new algorithm for one of the longstanding problems
                 in residue number system, namely division, is
                 presented. The algorithm is very simple. It approaches
                 the paper-and-pencil division procedure where the
                 quotient is selected to guarantee a non- \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Hitz:1995:IDR
author: Markus A. Hitz and Erich Kaltofen
title: Integer division in residue number systems
journal: j-IEEE-TRANS-COMPUT
volume: 44
number: 8
pages: 983--989
month: aug
monthnumber: 8
year: 1995
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.403714
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Wed Jul 6 08:01:29 MDT 2011
bibtimestamp: 2011.07.06 08:01:29 MDT
fjournal: IEEE Transactions on Computers
keywords: residue arithmetic; residue number system
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: Markus A. Hitz and Erich Kaltofen
rawtitle: Integer division in residue number systems
URL:
http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=403714; http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=9076

entry:
@Article{Hitz:1995:IDR,
  author =       "Markus A. Hitz and Erich Kaltofen",
  title =        "Integer division in residue number systems",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "44",
  number =       "8",
  pages =        "983--989",
  month =        aug,
  year =         "1995",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.403714",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Wed Jul 6 08:01:29 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=403714;
                 http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=9076",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
  keywords =     "residue arithmetic; residue number system",
  summary =      "This contribution to the ongoing discussion of
                 division algorithm for residue number systems (RNS) is
                 based on Newton iteration for computing the reciprocal.
                 An extended RNS with twice the number of moduli
                 provides the range required for \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Ho:1995:CFF
author: H. Ho and V. Szwarc and L. Desormeaux
booktitle: Proceedings of the Eighth Annual IEEE International ASIC Conference and Exhibit, 1995
title: A comparison of FIR filter implementations based on two's complement and residue number arithmetic
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 35--38
year: 1995
DOI: https://doi.org/10.1109/ASIC.1995.580676
bibdate: Fri Nov 9 11:38:58 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:58 MST
keywords: residue arithmetic; residue number system
acknowledgement: ack-nhfb
rawauthor: H. Ho and V. Szwarc and L. Desormeaux
rawbooktitle: Proceedings of the Eighth Annual {IEEE} International {ASIC} Conference and Exhibit, 1995
rawtitle:
A comparison of {FIR} filter implementations based on two's complement and residue number arithmetic

entry:
@InProceedings{Ho:1995:CFF,
  author =       "H. Ho and V. Szwarc and L. Desormeaux",
  booktitle =    "Proceedings of the Eighth Annual {IEEE} International
                 {ASIC} Conference and Exhibit, 1995",
  title =        "A comparison of {FIR} filter implementations based on
                 two's complement and residue number arithmetic",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "35--38",
  year =         "1995",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1109/ASIC.1995.580676",
  ISSN =         "????",
  bibdate =      "Fri Nov 9 11:38:58 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "residue arithmetic; residue number system",
  summary =      "Two FIR filter designs based on residue number
                 arithmetic (RNA) are presented and compared with a
                 conventional design based on two's complement
                 arithmetic (TCA). For the RNA based designs the
                 arithmetic operations are implemented by means of small
                 \ldots{}",
}


bibtype: mastersthesis
filename: fparith.bib
label: Ho:1995:FPI
author: Lei Ho
title: Floating point implementation for Motorola HC6811C: GNU C cross-compiler
type: Master's Thesis
school: Department of Electrical Engineering, Ryerson Polytechnic University
address: Toronto, Ontario, Canada
pages: 35--38
year: 1995
bibdate: Mon Apr 18 06:29:41 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.04.18 06:29:41 ???
acknowledgement: ack-nhfb
rawauthor: Lei Ho
rawtitle: Floating point implementation for {Motorola HC6811C}: {GNU C} cross-compiler
entry:
@MastersThesis{Ho:1995:FPI,
  author =       "Lei Ho",
  title =        "Floating point implementation for {Motorola HC6811C}:
                 {GNU C} cross-compiler",
  type =         "{Master}'s Thesis",
  school =       "Department of Electrical Engineering, Ryerson
                 Polytechnic University",
  address =      "Toronto, Ontario, Canada",
  year =         "1995",
  bibdate =      "Mon Apr 18 06:29:41 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  xxnote =       "Check thesis type?? Ryerson library catalog does not
                 specify.",
}


bibtype: article
filename: fparith.bib
label: Hobson:1995:EMR
author: R. F. Hobson and M. W. Fraser
title: An efficient maximum-redundancy radix-$8$ SRT division and square-root method
journal: j-IEEE-J-SOLID-STATE-CIRCUITS
volume: 30
number: 1
pages: 29--38
month: jan
monthnumber: 1
year: 1995
CODEN: IJSCBC
ISSN: 0018-9200 (print), 1558-173X (electronic) OR 00189200 (print), 1558173X (electronic)
ISSNL: 0018-9200 OR 00189200
bibdate: Sat Jul 16 15:28:13 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 15:28:13 MDT
fjournal: IEEE Journal of Solid-State Circuits
acknowledgement: ack-nhfb
affiliation: Sch. of Computer Science, Simon Fraser University, Burnaby, BC, Canada
rawauthor: R. F. Hobson and M. W. Fraser
rawtitle: An efficient maximum-redundancy radix-$8$ {SRT} division and square-root method
abstract:
A new approach to integrating hardware multiplication, division, and square-root is presented. We use a fully integrated control path which simultaneously reduces part of the redundant partial-remainder and performs a truncated multiplication of the next quotient or square-root digit by the divisor or square-root value. A separate (parallel) full precision iterative multiplier is used for partial remainder production. Strategic details of a radix-8 implementation are discussed. It is shown that a maximally redundant digit set is a viable choice for high performance in this case.

keywords:
1.2 Mum; CMOS adder cell; CMOS divider; Division; IEEE floating point algorithm; Integrated control path; Maximally redundant digit set; Maximum-redundancy radix-8 SRT algorithm; Multiplication; Parallel iterative multiplier; Partial remainder production; Redundant partial-remainder; Square-root method; Table lookup

thesaurus:
Adders; CMOS digital integrated circuits; Digital arithmetic; Dividing circuits; Floating point arithmetic; Multiplying circuits

rawabstract:
A new approach to integrating hardware multiplication, division, and square-root is presented. We use a fully integrated control path which simultaneously reduces part of the redundant partial-remainder and performs a truncated multiplication of the next quotient or square-root digit by the divisor or square-root value. A separate (parallel) full precision iterative multiplier is used for partial remainder production. Strategic details of a radix-8 implementation are discussed. It is shown that a maximally redundant digit set is a viable choice for high performance in this case.

entry:
@Article{Hobson:1995:EMR,
  author =       "R. F. Hobson and M. W. Fraser",
  title =        "An efficient maximum-redundancy radix-$8$ {SRT}
                 division and square-root method",
  journal =      j-IEEE-J-SOLID-STATE-CIRCUITS,
  volume =       "30",
  number =       "1",
  pages =        "29--38",
  month =        jan,
  year =         "1995",
  CODEN =        "IJSCBC",
  ISSN =         "0018-9200 (print), 1558-173X (electronic)",
  ISSN-L =       "0018-9200",
  bibdate =      "Sat Jul 16 15:28:13 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "A new approach to integrating hardware multiplication,
                 division, and square-root is presented. We use a fully
                 integrated control path which simultaneously reduces
                 part of the redundant partial-remainder and performs a
                 truncated multiplication of the next quotient or
                 square-root digit by the divisor or square-root value.
                 A separate (parallel) full precision iterative
                 multiplier is used for partial remainder production.
                 Strategic details of a radix-8 implementation are
                 discussed. It is shown that a maximally redundant digit
                 set is a viable choice for high performance in this
                 case.",
  acknowledgement = ack-nhfb,
  affiliation =  "Sch. of Computer Science, Simon Fraser University,
                 Burnaby, BC, Canada",
  classification = "B1265B (Logic circuits); B2570D (CMOS integrated
                 circuits); C5230 (Digital arithmetic methods)",
  fjournal =     "IEEE Journal of Solid-State Circuits",
  keywords =     "1.2 Mum; CMOS adder cell; CMOS divider; Division; IEEE
                 floating point algorithm; Integrated control path;
                 Maximally redundant digit set; Maximum-redundancy
                 radix-8 SRT algorithm; Multiplication; Parallel
                 iterative multiplier; Partial remainder production;
                 Redundant partial-remainder; Square-root method; Table
                 lookup",
  numericalindex = "Size 1.2E-06 m",
  summary =      "A new approach to integrating hardware multiplication,
                 division, and square-root is presented. We use a fully
                 integrated control path which simultaneously reduces
                 part of the redundant partial-remainder and performs a
                 truncated multiplication of the \ldots{}",
  thesaurus =    "Adders; CMOS digital integrated circuits; Digital
                 arithmetic; Dividing circuits; Floating point
                 arithmetic; Multiplying circuits",
}


bibtype: inproceedings
filename: fparith.bib
label: Houelle:1995:AFL
author: A. Houelle and H. Mehrez and N. Vaucher and L. Montalvo and A. Guyot
title: Application of Fast Layout Synthesis Environment to Dividers Evaluation
crossref: Knowles:1995:PSC
pages: 67--74
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Houelle.pdf
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: A. Houelle and H. Mehrez and N. Vaucher and L. Montalvo and A. Guyot
rawtitle: Application of Fast Layout Synthesis Environment to Dividers Evaluation
entry:
@InProceedings{Houelle:1995:AFL,
  author =       "A. Houelle and H. Mehrez and N. Vaucher and L.
                 Montalvo and A. Guyot",
  title =        "Application of Fast Layout Synthesis Environment to
                 Dividers Evaluation",
  crossref =     "Knowles:1995:PSC",
  pages =        "67--74",
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Houelle.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: inproceedings
filename: fparith.bib
label: Hunt:1995:APF
author: D. Hunt
title: Advanced performance features of the 64-bit PA-8000
crossref: IEEE:1995:DPC
pages: 123--128
month: mar
monthnumber: 3
year: 1995
bibdate: Thu Apr 2 08:38:35 1998
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1998.04.02 08:38:35 ???
acknowledgement: ack-sfo
rawauthor: D. Hunt
rawtitle: Advanced performance features of the 64-bit {PA-8000}
entry:
@InProceedings{Hunt:1995:APF,
  author =       "D. Hunt",
  title =        "Advanced performance features of the 64-bit
                 {PA-8000}",
  crossref =     "IEEE:1995:DPC",
  pages =        "123--128",
  month =        mar,
  year =         "1995",
  bibdate =      "Thu Apr 2 08:38:35 1998",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-sfo # " and " # ack-nhfb,
}


bibtype: techreport
filename: fparith.bib
label: Ito:1995:EIAa
author: Masayuki Ito and Naofumi Takagi and Shuzo Yajima
title: Efficient Initial Approximation Methods for Division and Square Using a Multiply-Add Unit
type: SIG Notes
number: 95-HPC-55-10
institution: IPSJ
pages: 73--80
month: mar
monthnumber: 3
year: 1995
bibdate: Wed Dec 13 10:53:57 2023
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2023.12.13 10:53:57 ???
acknowledgement: ack-nhfb
rawauthor: Masayuki Ito and Naofumi Takagi and Shuzo Yajima
rawtitle: Efficient Initial Approximation Methods for Division and Square Using a Multiply-Add Unit
remark:
I cannot find this online, so institution and address are uncertain. Is this a journal article or technical report?

entry:
@TechReport{Ito:1995:EIAa,
  author =       "Masayuki Ito and Naofumi Takagi and Shuzo Yajima",
  title =        "Efficient Initial Approximation Methods for Division
                 and Square Using a Multiply-Add Unit",
  type =         "SIG Notes",
  number =       "95-HPC-55-10",
  institution =  "IPSJ",
  address =      "????",
  pages =        "73--80",
  month =        mar,
  year =         "1995",
  bibdate =      "Wed Dec 13 10:53:57 2023",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  remark =       "I cannot find this online, so institution and address
                 are uncertain. Is this a journal article or technical
                 report?",
}


bibtype: inproceedings
filename: fparith.bib
label: Ito:1995:EIAb
author: Masayuki Ito and Naofumi Takagi and Shuzo Yajima
title: Efficient Initial Approximation and Fast Converging Methods for Division and Square Root
crossref: Knowles:1995:PSC
pages: 2--9
month: jul
monthnumber: 7
year: 1995
DOI: https://doi.org/10.1109/arith.1995.465383
bibdate: Sat Jul 16 15:28:14 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2005.07.16 15:28:14 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Ito.pdf
keywords: ARITH-12
acknowledgement: ack-sfo
rawauthor: Masayuki Ito and Naofumi Takagi and Shuzo Yajima
rawtitle: Efficient Initial Approximation and Fast Converging Methods for Division and Square Root
entry:
@InProceedings{Ito:1995:EIAb,
  author =       "Masayuki Ito and Naofumi Takagi and Shuzo Yajima",
  title =        "Efficient Initial Approximation and Fast Converging
                 Methods for Division and Square Root",
  crossref =     "Knowles:1995:PSC",
  pages =        "2--9",
  month =        jul,
  year =         "1995",
  DOI =          "https://doi.org/10.1109/arith.1995.465383",
  bibdate =      "Sat Jul 16 15:28:14 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Ito.pdf",
  acknowledgement = ack-sfo # " and " # ack-nhfb,
  keywords =     "ARITH-12",
  summary =      "Efficient initial approximations and fast converging
                 algorithms are important to achieve the desired
                 precision faster at lower hardware cost in
                 multiplicative division and square root. In this paper,
                 a new initial approximation method for division,
                 \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Jain:1995:HSD
author: V. K. Jain and L. Lin
title: High-Speed Double Precision Computation of Nonlinear Functions
crossref: Knowles:1995:PSC
pages: 107--114
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: V. K. Jain and L. Lin
rawtitle: High-Speed Double Precision Computation of Nonlinear Functions
entry:
@InProceedings{Jain:1995:HSD,
  author =       "V. K. Jain and L. Lin",
  title =        "High-Speed Double Precision Computation of Nonlinear
                 Functions",
  crossref =     "Knowles:1995:PSC",
  pages =        "107--114",
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: article
filename: fparith.bib
label: Jang:1995:OSA
author: Ju-Wook Jang and Viktor K. Prasanna
title: An Optimal Sorting Algorithm on Reconfigurable Mesh
journal: j-J-PAR-DIST-COMP
volume: 25
number: 1
pages: 31--41
day: 15
month: feb
monthnumber: 2
year: 1995
CODEN: JPDCER
DOI: https://doi.org/10.1006/jpdc.1995.1027
ISSN: 0743-7315 (print), 1096-0848 (electronic) OR 07437315 (print), 10960848 (electronic)
ISSNL: 0743-7315 OR 07437315
bibdate: Thu Mar 9 09:18:56 MST 2000
bibtimestamp: 2000.03.09 09:18:56 MST
fjournal: Journal of Parallel and Distributed Computing
acknowledgement: ack-nhfb
corpsource: University of Southern California, Los Angeles, CA, USA
journalURL: http://www.sciencedirect.com/science/journal/07437315
treatment: T Theoretical or Mathematical
rawauthor: Ju-Wook Jang and Viktor K. Prasanna
rawtitle: An Optimal Sorting Algorithm on Reconfigurable Mesh
URL:
http://www.idealibrary.com/links/doi/10.1006/jpdc.1995.1027/production; http://www.idealibrary.com/links/doi/10.1006/jpdc.1995.1027/production/pdf

keywords:
architectures; arithmetic; bit model; computational complexity; constant time; constant time algorithm; lower bound; optimal sorting algorithm; parallel; parallel algorithms; problems; reconfigurable architecture; reconfigurable architectures; reconfigurable mesh; sorting; VLSI

entry:
@Article{Jang:1995:OSA,
  author =       "Ju-Wook Jang and Viktor K. Prasanna",
  title =        "An Optimal Sorting Algorithm on Reconfigurable Mesh",
  journal =      j-J-PAR-DIST-COMP,
  volume =       "25",
  number =       "1",
  pages =        "31--41",
  day =          "15",
  month =        feb,
  year =         "1995",
  CODEN =        "JPDCER",
  DOI =          "https://doi.org/10.1006/jpdc.1995.1027",
  ISSN =         "0743-7315 (print), 1096-0848 (electronic)",
  ISSN-L =       "0743-7315",
  bibdate =      "Thu Mar 9 09:18:56 MST 2000",
  bibsource =    "http://www.idealibrary.com/servlet/useragent?func=showAllIssues&curIssueID=jpdc;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.idealibrary.com/links/doi/10.1006/jpdc.1995.1027/production;
                 http://www.idealibrary.com/links/doi/10.1006/jpdc.1995.1027/production/pdf",
  acknowledgement = ack-nhfb,
  classification = "C4240P (Parallel programming and algorithm theory);
                 C5220P (Parallel architecture); C6130 (Data handling
                 techniques)",
  corpsource =   "University of Southern California, Los Angeles, CA,
                 USA",
  fjournal =     "Journal of Parallel and Distributed Computing",
  journal-URL =  "http://www.sciencedirect.com/science/journal/07437315",
  keywords =     "architectures; arithmetic; bit model; computational
                 complexity; constant time; constant time algorithm;
                 lower bound; optimal sorting algorithm; parallel;
                 parallel algorithms; problems; reconfigurable
                 architecture; reconfigurable architectures;
                 reconfigurable mesh; sorting; VLSI",
  treatment =    "T Theoretical or Mathematical",
}


bibtype: unpublished
filename: fparith.bib
label: Kahan:1995:TSD
author: W. Kahan
title: A Test for SRT Division
pages: 31--41
year: 1995
bibdate: Mon Apr 25 05:50:41 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.04.25 05:50:41 ???
note: Lecture notes
URL: http://www.cs.berkeley.edu/~wkahan/srtest
keywords: floating-point testing
acknowledgement: ack-nhfb
rawauthor: W. Kahan
rawnote: Lecture notes
rawtitle: A Test for {SRT} Division
entry:
@Unpublished{Kahan:1995:TSD,
  author =       "W. Kahan",
  title =        "A Test for {SRT} Division",
  year =         "1995",
  bibdate =      "Mon Apr 25 05:50:41 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "Lecture notes",
  URL =          "http://www.cs.berkeley.edu/~wkahan/srtest",
  acknowledgement = ack-nhfb,
  keywords =     "floating-point testing",
}


bibtype: misc
filename: fparith.bib
label: Kahan:1995:USP
author: Students of Prof.W.Kahan
pages: 31--41
day: 12
month: mar
monthnumber: 3
year: 1995
bibdate: Wed May 26 07:29:55 2004
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.05.26 07:29:55 ???
URL: http://www.netlib.org/fp/ucbtest.tgz
keywords: floating-point testing
acknowledgement: ack-nhfb
howpublished: World-Wide Web document
rawauthor: {Students of Prof.W.Kahan}
title:
UCBTEST: a suite of programs for testing certain difficult cases of IEEE 754 floating-point arithmetic

remark:
From the source code, students and authors credited are (in alphabetical order) M. Alemi, D. Feenberg, Warren Ferguson David G. Hough, David Gay, W. J. Cody, R. Karpkinski, Z. A. Liu, S. Ma, Stephen Moshier, M. Mueller, K. C. Ng, D. Priest, T. Quarles, T. Sumner, G. Taylor, B. Toy, W. Waite, and B. Wichmann.

rawtitle:
{UCBTEST}: a suite of programs for testing certain difficult cases of {IEEE 754} floating-point arithmetic

entry:
@Misc{Kahan:1995:USP,
  author =       "{Students of Prof.W.Kahan}",
  title =        "{UCBTEST}: a suite of programs for testing certain
                 difficult cases of {IEEE 754} floating-point
                 arithmetic",
  howpublished = "World-Wide Web document",
  day =          "12",
  month =        mar,
  year =         "1995",
  bibdate =      "Wed May 26 07:29:55 2004",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.netlib.org/fp/ucbtest.tgz",
  acknowledgement = ack-nhfb,
  keywords =     "floating-point testing",
  remark =       "From the source code, students and authors credited
                 are (in alphabetical order) M. Alemi, D. Feenberg,
                 Warren Ferguson David G. Hough, David Gay, W. J. Cody,
                 R. Karpkinski, Z. A. Liu, S. Ma, Stephen Moshier, M.
                 Mueller, K. C. Ng, D. Priest, T. Quarles, T. Sumner, G.
                 Taylor, B. Toy, W. Waite, and B. Wichmann.",
}


bibtype: article
filename: fparith.bib
label: Kaliski:1995:MIA
author: Burton S. Kaliski, Jr.
title: The Montgomery inverse and its applications
journal: j-IEEE-TRANS-COMPUT
volume: 44
number: 8
pages: 1064--1065
month: aug
monthnumber: 8
year: 1995
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.403725
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Wed Jul 6 08:01:29 MDT 2011
bibtimestamp: 2011.07.06 08:01:29 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=403725
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: Burton S. {Kaliski, Jr.}
rawtitle: The {Montgomery} inverse and its applications
abstract:
The Montgomery inverse of $b$ modulo $a$ is $ b^-1 2^n bmod a $, where $n$ is the number of bits in $a$. The right-shifting binary algorithm for modular inversion is shown naturally to compute the new inverse in fewer operations than the ordinary modular inverse. The new inverse facilitates recent work by Koc on modular exponentiation and has other applications in cryptography

rawabstract:
The Montgomery inverse of $b$ modulo $a$ is $ b^{-1} 2^n \bmod a $, where $n$ is the number of bits in $a$. The right-shifting binary algorithm for modular inversion is shown naturally to compute the new inverse in fewer operations than the ordinary modular inverse. The new inverse facilitates recent work by Ko{\c{c}} on modular exponentiation and has other applications in cryptography

entry:
@Article{Kaliski:1995:MIA,
  author =       "Burton S. {Kaliski, Jr.}",
  title =        "The {Montgomery} inverse and its applications",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "44",
  number =       "8",
  pages =        "1064--1065",
  month =        aug,
  year =         "1995",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.403725",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Wed Jul 6 08:01:29 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=403725",
  abstract =     "The Montgomery inverse of $b$ modulo $a$ is $ b^{-1}
                 2^n \bmod a $, where $n$ is the number of bits in $a$.
                 The right-shifting binary algorithm for modular
                 inversion is shown naturally to compute the new inverse
                 in fewer operations than the ordinary modular inverse.
                 The new inverse facilitates recent work by Ko{\c{c}} on
                 modular exponentiation and has other applications in
                 cryptography",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: phdthesis
filename: fparith.bib
label: Kalliojarvi:1995:FWL
author: Kari Kalliojarvi
volume: 159
type: Avhandling (doktorgrad)
school: Tampereen teknillinen korkeakoulu
address: Tampere, Finland
pages: vii + 71 + 68
year: 1995
ISBN: 951-722-330-7 OR 9517223307
ISBN13: 978-951-722-330-0 OR 9789517223300
bibdate: Thu May 09 08:21:36 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2002.05.09 08:21:36 ???
series: Julkaisuja
acknowledgement: ack-nhfb
rawauthor: Kari Kallioj{\"a}rvi
title:
Finite word length effects in floating-point and block-floating-point digital signal processing systems

rawtitle:
Finite word length effects in floating-point and block-floating-point digital signal processing systems

entry:
@PhdThesis{Kalliojarvi:1995:FWL,
  author =       "Kari Kallioj{\"a}rvi",
  title =        "Finite word length effects in floating-point and
                 block-floating-point digital signal processing
                 systems",
  volume =       "159",
  type =         "Avhandling (doktorgrad)",
  school =       "Tampereen teknillinen korkeakoulu",
  address =      "Tampere, Finland",
  pages =        "vii + 71 + 68",
  year =         "1995",
  ISBN =         "951-722-330-7",
  ISBN-13 =      "978-951-722-330-0",
  bibdate =      "Thu May 09 08:21:36 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  series =       "Julkaisuja",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Ke:1995:SFQ
author: Qing Ke and M. J. Feldman
title: Single Flux Quantum Circuits Using the Residue Number System
journal: j-IEEE-TRANS-APPL-SUPERCOND
volume: 5
number: 2
pages: 2988--2991
month: jun
monthnumber: 6
year: 1995
CODEN: ITASE9
DOI: https://doi.org/10.1109/77.403220
ISSN: 1051-8223 (print), 1558-2515 (electronic) OR 10518223 (print), 15582515 (electronic)
ISSNL: 1051-8223 OR 10518223
bibdate: Fri Nov 9 11:38:58 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:58 MST
URL: http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=9069
fjournal: IEEE Transactions on Applied Superconductivity
keywords: residue arithmetic; residue number system (RNS)
acknowledgement: ack-nhfb
rawauthor: Qing Ke and M. J. Feldman
rawtitle: Single Flux Quantum Circuits Using the Residue Number System
entry:
@Article{Ke:1995:SFQ,
  author =       "Qing Ke and M. J. Feldman",
  title =        "Single Flux Quantum Circuits Using the Residue Number
                 System",
  journal =      j-IEEE-TRANS-APPL-SUPERCOND,
  volume =       "5",
  number =       "2",
  pages =        "2988--2991",
  month =        jun,
  year =         "1995",
  CODEN =        "ITASE9",
  DOI =          "https://doi.org/10.1109/77.403220",
  ISSN =         "1051-8223 (print), 1558-2515 (electronic)",
  ISSN-L =       "1051-8223",
  bibdate =      "Fri Nov 9 11:38:58 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=9069",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Applied Superconductivity",
  keywords =     "residue arithmetic; residue number system (RNS)",
  summary =      "We have designed and developed superconducting single
                 flux quantum (SFQ) digital signal processing circuits
                 using the residue number system (RNS). RNS arithmetic
                 is a complete alternative to binary arithmetic for
                 performing digital computations, \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Kistermann:1995:RWS
author: Friedrich Wilhelm Kistermann
crossref: Seck:1995:GWS
pages: 241--272
year: 1995
bibdate: Sat Jul 27 12:43:03 2013
bibtimestamp: 2013.07.27 12:43:03 ???
language: German
acknowledgement: ack-nhfb
rawauthor: Friedrich Wilhelm Kistermann
title:
Die Rechentechnik um 1600 und Wilhelm Schickards Rechenmaschine. (German) [The calculating technique of 1600 and Wilhelm Schickard's calculator]

bibsource:
https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/scicontext.bib

rawtitle:
{Die Rechentechnik um 1600 und Wilhelm Schickards Rechenmaschine}. ({German}) [{The} calculating technique of 1600 and {Wilhelm Schickard}'s calculator]

entry:
@InProceedings{Kistermann:1995:RWS,
  author =       "Friedrich Wilhelm Kistermann",
  title =        "{Die Rechentechnik um 1600 und Wilhelm Schickards
                 Rechenmaschine}. ({German}) [{The} calculating
                 technique of 1600 and {Wilhelm Schickard}'s
                 calculator]",
  crossref =     "Seck:1995:GWS",
  pages =        "241--272",
  year =         "1995",
  bibdate =      "Sat Jul 27 12:43:03 2013",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/scicontext.bib",
  acknowledgement = ack-nhfb,
  language =     "German",
}


bibtype: inproceedings
filename: fparith.bib
label: Knowles:1995:FSC
author: Simon Knowles and William H. McAllister
title: Foreword: 12th Symposium on Computer Arithmetic, Assembly Rooms, Bath, England, July 19--21, 1995
crossref: Knowles:1995:PSC
pages: ix--x
year: 1995
bibdate: Sat Nov 17 12:02:52 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.17 12:02:52 ???
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: Simon Knowles and William H. McAllister
rawtitle: Foreword: {12th Symposium on Computer Arithmetic, Assembly Rooms, Bath, England, July 19--21, 1995}
URL:
http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_contents.pdf; http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_foreword.pdf; http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_preface.pdf

entry:
@InProceedings{Knowles:1995:FSC,
  author =       "Simon Knowles and William H. McAllister",
  title =        "Foreword: {12th Symposium on Computer Arithmetic,
                 Assembly Rooms, Bath, England, July 19--21, 1995}",
  crossref =     "Knowles:1995:PSC",
  pages =        "ix--x",
  year =         "1995",
  bibdate =      "Sat Nov 17 12:02:52 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_contents.pdf;
                 http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_foreword.pdf;
                 http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_preface.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: article
filename: fparith.bib
label: Koko:1995:FP
author: Boma Koko
title: Floating Point
journal: j-COMPUT-AIDED-ENG
volume: 14
number: 10
pages: 132--??
year: 1995
CODEN: CCAEDJ
ISSN: 0733-3536 (print), 2162-1365 (electronic) OR 07333536 (print), 21621365 (electronic)
ISSNL: 0733-3536 OR 07333536
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
fjournal: Computer-aided engineering: CAE
acknowledgement: ack-nhfb
rawauthor: Boma Koko
rawtitle: Floating Point
entry:
@Article{Koko:1995:FP,
  author =       "Boma Koko",
  title =        "Floating Point",
  journal =      j-COMPUT-AIDED-ENG,
  volume =       "14",
  number =       "10",
  pages =        "132--??",
  year =         "1995",
  CODEN =        "CCAEDJ",
  ISSN =         "0733-3536 (print), 2162-1365 (electronic)",
  ISSN-L =       "0733-3536",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "Computer-aided engineering: CAE",
}


bibtype: article
filename: fparith.bib
label: Kubota:1995:DRE
author: K. Kubota
journal: Transactions of the Japan Society for Industrial and Applied Mathematics
volume: 5
number: 1
pages: 37--46
year: 1995
ISSN: 0917-2246 OR 09172246
bibdate: Thu Dec 14 11:25:18 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.14 11:25:18 MST
language: Japanese
acknowledgement: ack-nhfb
affiliation: Fac. of Sci. and Eng., Chuo University, Tokyo, Japan
thesaurus: Error analysis; Floating point arithmetic; Probability; Random processes
rawauthor: K. Kubota
title:
On distribution of rounding errors generated in additions and subtractions of floating-point numbers

abstract:
Analyzing the behaviour of rounding errors generated in additions and subtractions of floating-point numbers and regarding them as random variables, we propose a slightly strange model for their distribution. The model gives distributions which approximate the observed generated relative errors more precisely than the uniform distribution which is usually adopted in probabilistic analysis of rounding errors.

keywords:
Additions; Distribution; Floating-point numbers; Probabilistic analysis; Random variables; Relative errors; Rounding errors; Subtractions; Uniform distribution

rawabstract:
Analyzing the behaviour of rounding errors generated in additions and subtractions of floating-point numbers and regarding them as random variables, we propose a slightly strange model for their distribution. The model gives distributions which approximate the observed generated relative errors more precisely than the uniform distribution which is usually adopted in probabilistic analysis of rounding errors.

rawtitle:
On distribution of rounding errors generated in additions and subtractions of floating-point numbers

entry:
@Article{Kubota:1995:DRE,
  author =       "K. Kubota",
  title =        "On distribution of rounding errors generated in
                 additions and subtractions of floating-point numbers",
  journal =      "Transactions of the Japan Society for Industrial and
                 Applied Mathematics",
  volume =       "5",
  number =       "1",
  pages =        "37--46",
  month =        "????",
  year =         "1995",
  ISSN =         "0917-2246",
  bibdate =      "Thu Dec 14 11:25:18 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "Analyzing the behaviour of rounding errors generated
                 in additions and subtractions of floating-point numbers
                 and regarding them as random variables, we propose a
                 slightly strange model for their distribution. The
                 model gives distributions which approximate the
                 observed generated relative errors more precisely than
                 the uniform distribution which is usually adopted in
                 probabilistic analysis of rounding errors.",
  acknowledgement = ack-nhfb,
  affiliation =  "Fac. of Sci. and Eng., Chuo University, Tokyo, Japan",
  classification = "C1140 (Probability and statistics); C4110 (Error
                 analysis in numerical methods); C5230 (Digital
                 arithmetic methods)",
  keywords =     "Additions; Distribution; Floating-point numbers;
                 Probabilistic analysis; Random variables; Relative
                 errors; Rounding errors; Subtractions; Uniform
                 distribution",
  language =     "Japanese",
  pubcountry =   "Japan",
  thesaurus =    "Error analysis; Floating point arithmetic;
                 Probability; Random processes",
}


bibtype: inproceedings
filename: fparith.bib
label: Kwan:1995:CII
author: Hercule Kwan and Robert Leonard Nelson, Jr. and Earl E. Swartzlander, Jr.
title: Cascaded Implementation of an Iterative Inverse-Square-Root Algorithm, with Overflow Lookahead
crossref: Knowles:1995:PSC
pages: 115--122
year: 1995
bibdate: Sat Jul 16 15:28:14 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2005.07.16 15:28:14 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Kwan.pdf
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: Hercule Kwan and Robert Leonard {Nelson, Jr.} and Earl E. {Swartzlander, Jr.}
rawtitle: Cascaded Implementation of an Iterative Inverse-Square-Root Algorithm, with Overflow Lookahead
entry:
@InProceedings{Kwan:1995:CII,
  author =       "Hercule Kwan and Robert Leonard {Nelson, Jr.} and Earl
                 E. {Swartzlander, Jr.}",
  title =        "Cascaded Implementation of an Iterative
                 Inverse-Square-Root Algorithm, with Overflow
                 Lookahead",
  crossref =     "Knowles:1995:PSC",
  pages =        "115--122",
  year =         "1995",
  bibdate =      "Sat Jul 16 15:28:14 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Kwan.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
  summary =      "We present an unconventional method of computing the
                 inverse of the square root. It implements the
                 equivalent of two iterations of a well-known
                 multiplicative method to obtain 24-bit mantissa
                 accuracy. We implement each ``iteration'' as a
                 \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Lang:1995:VHR
author: Tomas Lang and Paolo Montuschi
title: Very-High Radix Combined Division and Square Root with Prescaling and Selection by Rounding
crossref: Knowles:1995:PSC
pages: 124--131
year: 1995
bibdate: Sat Jul 16 15:28:14 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2005.07.16 15:28:14 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Lang.pdf
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: Tom{\'a}s Lang and Paolo Montuschi
rawtitle: Very-High Radix Combined Division and Square Root with Prescaling and Selection by Rounding
entry:
@InProceedings{Lang:1995:VHR,
  author =       "Tom{\'a}s Lang and Paolo Montuschi",
  title =        "Very-High Radix Combined Division and Square Root with
                 Prescaling and Selection by Rounding",
  crossref =     "Knowles:1995:PSC",
  pages =        "124--131",
  year =         "1995",
  bibdate =      "Sat Jul 16 15:28:14 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Lang.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
  summary =      "An algorithm for square root with prescaling is
                 developed and combined with a similar scheme for
                 division. An implementation is described, evaluated and
                 compared with other combined div/sqrt \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Leeser:1995:VSR
author: M. Leeser and J. O'Leary
title: Verification of a subtractive radix-$2$ square root algorithm and implementation
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 526--531
year: 1995
bibdate: Sat Jul 16 15:28:14 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 15:28:14 MDT
acknowledgement: ack-nhfb
rawauthor: M. Leeser and J. O'Leary
rawtitle: Verification of a subtractive radix-$2$ square root algorithm and implementation
booktitle:
Proceedings of the IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD '95

rawbooktitle:
Proceedings of the {IEEE} International Conference on Computer Design: {VLSI} in Computers and Processors, {ICCD '95}

entry:
@InProceedings{Leeser:1995:VSR,
  author =       "M. Leeser and J. O'Leary",
  booktitle =    "Proceedings of the {IEEE} International Conference on
                 Computer Design: {VLSI} in Computers and Processors,
                 {ICCD '95}",
  title =        "Verification of a subtractive radix-$2$ square root
                 algorithm and implementation",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "526--531",
  year =         "1995",
  CODEN =        "????",
  ISSN =         "????",
  bibdate =      "Sat Jul 16 15:28:14 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  summary =      "Many modern microprocessors implement floating point
                 square root hardware using subtractive algorithms. Such
                 processors include the HP PA7200, the MIPS R4400, and
                 the Intel Pentium. The Intel Pentium division bug
                 highlights the importance of \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Lehmann:1995:SLE
author: N. Joachim Lehmann
crossref: Seck:1995:GWS
pages: 273--286
year: 1995
bibdate: Sat Jul 27 12:46:37 2013
bibtimestamp: 2013.07.27 12:46:37 ???
language: German
acknowledgement: ack-nhfb
rawauthor: N. Joachim Lehmann
title:
Schickard und Leibniz als Erfinder von rechenmaschinen. (German) [Schickard and Leibniz, the inventors of calculators]

bibsource:
https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/scicontext.bib

rawtitle:
{Schickard und Leibniz als Erfinder von rechenmaschinen}. ({German}) [{Schickard} and {Leibniz}, the inventors of calculators]

entry:
@InProceedings{Lehmann:1995:SLE,
  author =       "N. Joachim Lehmann",
  title =        "{Schickard und Leibniz als Erfinder von
                 rechenmaschinen}. ({German}) [{Schickard} and
                 {Leibniz}, the inventors of calculators]",
  crossref =     "Seck:1995:GWS",
  pages =        "273--286",
  year =         "1995",
  bibdate =      "Sat Jul 27 12:46:37 2013",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/scicontext.bib",
  acknowledgement = ack-nhfb,
  language =     "German",
}


bibtype: article
filename: fparith.bib
label: Liu:1995:SRV
author: S.-I. Liu
title: Square-rooting and vector summation circuits using current conveyors
volume: 142
number: 4
pages: 223--226
month: aug
monthnumber: 8
year: 1995
bibdate: Sat Jul 16 15:28:13 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 15:28:13 MDT
keywords: accurate floating-point summation
acknowledgement: ack-nhfb
rawauthor: S.-I. Liu
rawtitle: Square-rooting and vector summation circuits using current conveyors
journal:
IEE Proceedings on Circuits, Devices and Systems [see also IEE Proceedings G- Circuits, Devices and Systems]

entry:
@Article{Liu:1995:SRV,
  author =       "S.-I. Liu",
  title =        "Square-rooting and vector summation circuits using
                 current conveyors",
  journal =      "IEE Proceedings on Circuits, Devices and Systems [see
                 also IEE Proceedings G- Circuits, Devices and
                 Systems]",
  volume =       "142",
  number =       "4",
  pages =        "223--226",
  month =        aug,
  year =         "1995",
  CODEN =        "????",
  ISSN =         "????",
  bibdate =      "Sat Jul 16 15:28:13 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "accurate floating-point summation",
  summary =      "New analogue squaring, square-rooting and vector
                 summation circuits using current conveyors (CCIIs) are
                 presented. They consist of MOS transistors biased in
                 the triode region, a buffered unity-gain inverting
                 amplifier, resistors and CCIIs. A general \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Louie:1995:VPS
author: Marianne E. Louie and Milos D. Ercegovac
title: A Variable-Precision Square Root Implementation for Field Programmable Gate Arrays
journal: j-J-SUPERCOMPUTING
volume: 9
number: 3
pages: 315--336
month: sep
monthnumber: 9
year: 1995
CODEN: JOSUED
DOI: https://doi.org/10.1007/BF01212874
ISSN: 0920-8542 (print), 1573-0484 (electronic) OR 09208542 (print), 15730484 (electronic)
ISSNL: 0920-8542 OR 09208542
bibdate: Wed Jul 6 11:13:09 MDT 2005
bibtimestamp: 2005.07.06 11:13:09 MDT
fjournal: The Journal of Supercomputing
acknowledgement: ack-nhfb
affiliation: Department of Computer Science, California University, Los Angeles, CA, USA
corpsource: Department of Computer Science, California University, Los Angeles, CA, USA
journalURL: http://link.springer.com/journal/11227
treatment: P Practical
rawauthor: Marianne E. Louie and Milo{\v{s}} D. Ercegovac
rawtitle: A Variable-Precision Square Root Implementation for Field Programmable Gate Arrays
bibsource:
http://springerlink.metapress.com/openurl.asp?genre=issue&issn=0920-8542&volume=9&issue=3; http://www.wkap.nl/issuetoc.htm/0920-8542+9+3+1995; https://www.math.utah.edu/pub/tex/bib/fparith.bib

URL:
http://www.springerlink.com/openurl.asp?genre=article&issn=0920-8542&volume=9&issue=3&spage=315; http://www.wkap.nl/oasis.htm/95692

keywords:
digital arithmetic; field programmable gate arrays; square root; square root implementation; variable-precision; Xilinx XC4010

entry:
@Article{Louie:1995:VPS,
  author =       "Marianne E. Louie and Milo{\v{s}} D. Ercegovac",
  title =        "A Variable-Precision Square Root Implementation for
                 Field Programmable Gate Arrays",
  journal =      j-J-SUPERCOMPUTING,
  volume =       "9",
  number =       "3",
  pages =        "315--336",
  month =        sep,
  year =         "1995",
  CODEN =        "JOSUED",
  DOI =          "https://doi.org/10.1007/BF01212874",
  ISSN =         "0920-8542 (print), 1573-0484 (electronic)",
  ISSN-L =       "0920-8542",
  bibdate =      "Wed Jul 6 11:13:09 MDT 2005",
  bibsource =    "http://springerlink.metapress.com/openurl.asp?genre=issue&issn=0920-8542&volume=9&issue=3;
                 http://www.wkap.nl/issuetoc.htm/0920-8542+9+3+1995;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.springerlink.com/openurl.asp?genre=article&issn=0920-8542&volume=9&issue=3&spage=315;
                 http://www.wkap.nl/oasis.htm/95692",
  acknowledgement = ack-nhfb,
  affiliation =  "Department of Computer Science, California University,
                 Los Angeles, CA, USA",
  classification = "C5120 (Logic and switching circuits); C5230 (Digital
                 arithmetic methods)",
  corpsource =   "Department of Computer Science, California University,
                 Los Angeles, CA, USA",
  fjournal =     "The Journal of Supercomputing",
  journal-URL =  "http://link.springer.com/journal/11227",
  keywords =     "digital arithmetic; field programmable gate arrays;
                 square root; square root implementation;
                 variable-precision; Xilinx XC4010",
  treatment =    "P Practical",
}


bibtype: techreport
filename: fparith.bib
label: Lozier:1995:EBL
author: Daniel W. Lozier and P. R. Turner
title: Error-Bounding in Level-Index Computer Arithmetic
type: Internal Report
number: NISTIR-5724
institution: National Bureau of Standards
address: Gaithersburg, MD, USA
pages: 315--336
year: 1995
bibdate: Tue Nov 05 15:20:28 2019
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2019.11.05 15:20:28 ???
URL: https://www.nist.gov/publications/error-bounding-level-index-computer-arithmetic
acknowledgement: ack-nhfb
rawauthor: Daniel W. Lozier and P. R. Turner
rawtitle: Error-Bounding in Level-Index Computer Arithmetic
entry:
@TechReport{Lozier:1995:EBL,
  author =       "Daniel W. Lozier and P. R. Turner",
  title =        "Error-Bounding in Level-Index Computer Arithmetic",
  type =         "Internal Report",
  number =       "NISTIR-5724",
  institution =  "National Bureau of Standards",
  address =      "Gaithersburg, MD, USA",
  year =         "1995",
  bibdate =      "Tue Nov 05 15:20:28 2019",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "https://www.nist.gov/publications/error-bounding-level-index-computer-arithmetic",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Lynch:1995:HRL
author: Thomas Lynch and Michael J. Schulte
title: A High Radix On-line Arithmetic for Credible and Accurate Computing
journal: j-J-UCS
volume: 1
number: 7
pages: 439--453
day: 28
month: jul
monthnumber: 7
year: 1995
ISSN: 0948-6968 OR 09486968
ISSNL: 0948-6968 OR 09486968
MRclass: 68M07
MRnumber: 1 403 706
bibdate: Wed May 28 19:32:35 MDT 1997
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1997.05.28 19:32:35 MDT
URL: http://www.jucs.org/a_high_radix_online_arithmetic
fjournal: J.UCS: Journal of Universal Computer Science
acknowledgement: ack-nhfb
journalURL: http://www.jucs.org/jucs
rawauthor: Thomas Lynch and Michael J. Schulte
rawtitle: A High Radix On-line Arithmetic for Credible and Accurate Computing
entry:
@Article{Lynch:1995:HRL,
  author =       "Thomas Lynch and Michael J. Schulte",
  title =        "A High Radix On-line Arithmetic for Credible and
                 Accurate Computing",
  journal =      j-J-UCS,
  volume =       "1",
  number =       "7",
  pages =        "439--453",
  day =          "28",
  month =        jul,
  year =         "1995",
  CODEN =        "????",
  ISSN =         "0948-6968",
  ISSN-L =       "0948-6968",
  MRclass =      "68M07",
  MRnumber =     "1 403 706",
  bibdate =      "Wed May 28 19:32:35 MDT 1997",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.jucs.org/a_high_radix_online_arithmetic",
  acknowledgement = ack-nhfb,
  fjournal =     "J.UCS: Journal of Universal Computer Science",
  journal-URL =  "http://www.jucs.org/jucs",
}


bibtype: inproceedings
filename: fparith.bib
label: Lynch:1995:KTF
author: Tom Lynch and Ahmed Ahmed and Mike Schulte and Tom Callaway and Robert Tisdale
title: The K5 Transcendental Functions
crossref: Knowles:1995:PSC
pages: 163--171
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: Tom Lynch and Ahmed Ahmed and Mike Schulte and Tom Callaway and Robert Tisdale
rawtitle: The {K5} Transcendental Functions
URL:
http://mesa.ece.wisc.edu/publications/cp_1995-04.pdf; http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Lynch.pdf

entry:
@InProceedings{Lynch:1995:KTF,
  author =       "Tom Lynch and Ahmed Ahmed and Mike Schulte and Tom
                 Callaway and Robert Tisdale",
  title =        "The {K5} Transcendental Functions",
  crossref =     "Knowles:1995:PSC",
  pages =        "163--171",
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://mesa.ece.wisc.edu/publications/cp_1995-04.pdf;
                 http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Lynch.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: inproceedings
filename: fparith.bib
label: Lyu:1995:RBB
author: Chung Nan Lyu and David W. Matula
title: Redundant Binary Booth Recoding
crossref: Knowles:1995:PSC
pages: 50--58
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Chung.pdf
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: Chung Nan Lyu and David W. Matula
rawtitle: Redundant Binary {Booth} Recoding
entry:
@InProceedings{Lyu:1995:RBB,
  author =       "Chung Nan Lyu and David W. Matula",
  title =        "Redundant Binary {Booth} Recoding",
  crossref =     "Knowles:1995:PSC",
  pages =        "50--58",
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Chung.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: article
filename: fparith.bib
label: Mandelbaum:1995:DUL
author: D. M. Mandelbaum
title: Division using a logarithmic-exponential transform to form a short reciprocal
journal: j-IEEE-TRANS-COMPUT
volume: 44
number: 11
pages: 1326--1330
month: nov
monthnumber: 11
year: 1995
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.475129
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Wed Jul 6 08:01:30 MDT 2011
bibtimestamp: 2011.07.06 08:01:30 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=475129
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: D. M. Mandelbaum
rawtitle: Division using a logarithmic-exponential transform to form a short reciprocal
entry:
@Article{Mandelbaum:1995:DUL,
  author =       "D. M. Mandelbaum",
  title =        "Division using a logarithmic-exponential transform to
                 form a short reciprocal",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "44",
  number =       "11",
  pages =        "1326--1330",
  month =        nov,
  year =         "1995",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.475129",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Wed Jul 6 08:01:30 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=475129",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: inproceedings
filename: fparith.bib
label: Martel:1995:DSO
author: Charles Martel and Vojin Oklobdzija and R. Ravi and Paul F. Stelling
title: Design Strategies for Optimal Multiplier Circuits
crossref: Knowles:1995:PSC
pages: 42--49
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Martel.pdf
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: Charles Martel and Vojin Oklobdzija and R. Ravi and Paul F. Stelling
rawtitle: Design Strategies for Optimal Multiplier Circuits
entry:
@InProceedings{Martel:1995:DSO,
  author =       "Charles Martel and Vojin Oklobdzija and R. Ravi and
                 Paul F. Stelling",
  title =        "Design Strategies for Optimal Multiplier Circuits",
  crossref =     "Knowles:1995:PSC",
  pages =        "42--49",
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Martel.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: inproceedings
filename: fparith.bib
label: Matsubara:1995:NBS
author: Gensoh Matsubara and Nobuhiro Ide and Haruyuki Tago and Seigo Suzuki and Nobuyuki Goto
title: 30-ns 55-b Shared Radix $2$ Division and Square Root Using a Self-Timed Circuit
crossref: Knowles:1995:PSC
pages: 98--105
year: 1995
bibdate: Sat Jul 16 15:28:14 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2005.07.16 15:28:14 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Matsubara.pdf
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: Gensoh Matsubara and Nobuhiro Ide and Haruyuki Tago and Seigo Suzuki and Nobuyuki Goto
rawtitle: 30-ns 55-b Shared Radix $2$ Division and Square Root Using a Self-Timed Circuit
entry:
@InProceedings{Matsubara:1995:NBS,
  author =       "Gensoh Matsubara and Nobuhiro Ide and Haruyuki Tago
                 and Seigo Suzuki and Nobuyuki Goto",
  title =        "30-ns 55-b Shared Radix $2$ Division and Square Root
                 Using a Self-Timed Circuit",
  crossref =     "Knowles:1995:PSC",
  pages =        "98--105",
  year =         "1995",
  bibdate =      "Sat Jul 16 15:28:14 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Matsubara.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
  summary =      "A shared radix 2 division and square root
                 implementation using a self-timed circuit is presented.
                 The same execution time for division and square root is
                 achieved by using an on-the-fly digit decoding and a
                 root multiple generation technique. Most \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Meissner:1995:EAD
author: Loren P. Meissner
journal: j-FORTRAN-FORUM
volume: 14
number: 3
pages: 1--3
month: sep
monthnumber: 9
year: 1995
ISSN: 1061-7264 (print), 1931-1311 (electronic) OR 10617264 (print), 19311311 (electronic)
ISSNL: 1061-7264 OR 10617264
bibdate: Thu Feb 07 06:54:12 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2002.02.07 06:54:12 ???
fjournal: ACM Fortran Forum
acknowledgement: ack-nhfb
journalURL: http://portal.acm.org/toc.cfm?id=J286
issue: 43
rawauthor: Loren P. Meissner
title:
From the Editor: Allocatable Dummy Argument Arrays; How Should Fortran Standards Describe Arithmetic? Are External Procedures Obsolete?; When are Local Variables Initialized in F77 and F90?

rawtitle:
From the {Editor}: Allocatable Dummy Argument Arrays; How Should {Fortran Standards} Describe Arithmetic? Are External Procedures Obsolete?; When are Local Variables Initialized in {F77} and {F90}?

entry:
@Article{Meissner:1995:EAD,
  author =       "Loren P. Meissner",
  title =        "From the {Editor}: Allocatable Dummy Argument Arrays;
                 How Should {Fortran Standards} Describe Arithmetic? Are
                 External Procedures Obsolete?; When are Local Variables
                 Initialized in {F77} and {F90}?",
  journal =      j-FORTRAN-FORUM,
  volume =       "14",
  number =       "3",
  pages =        "1--3",
  month =        sep,
  year =         "1995",
  CODEN =        "????",
  ISSN =         "1061-7264 (print), 1931-1311 (electronic)",
  ISSN-L =       "1061-7264",
  bibdate =      "Thu Feb 07 06:54:12 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "ACM Fortran Forum",
  issue =        "43",
  journal-URL =  "http://portal.acm.org/toc.cfm?id=J286",
}


bibtype: article
filename: fparith.bib
label: Metafas:1995:FAC
author: D. E. Metafas and C. E. Goutis
title: A Floating-Point Advanced CORDIC Processor
journal: j-J-VLSI-SIGNAL-PROC
volume: 10
number: 1
pages: 53--65
month: jun
monthnumber: 6
year: 1995
CODEN: JVSPED
DOI: https://doi.org/10.1007/BF02407026
ISSN: 0922-5773 (print), 1573-109x (electronic) OR 09225773 (print), 1573109x (electronic)
ISSNL: 0922-5773 OR 09225773
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
fjournal: Journal of VLSI Signal Processing
acknowledgement: ack-nhfb
rawauthor: D. E. Metafas and C. E. Goutis
rawtitle: A Floating-Point Advanced {CORDIC} Processor
abstract:
In this paper, a novel architecture of a floating-point digital signal processor is presented. It introduces a single hardware structure with a full set of elementary arithmetic functions which includes sin, cos, tan, arctanh, circular rotation and vectoring, sinh, cosh, tanh, arctanh, hyperbolic rotation and vectoring, square root, logarithm, exponential as well as addition, multiplication and division. The architecture of the processor is based on the COordinate Rotation DIgital Computer (CORDIC) and the Convergence Computing Method (CCM) algorithms for computing arithmetic functions and it is fully parallel and pipelined. Its advanced functionality is achieved without significant increase in hardware, in comparison to ordinary CORDIC processor, and makes it an ideal processing element in high speed multiprocessor applications, e.g. real time Digital Signal Processing (DSP) and computer graphics.

rawabstract:
In this paper, a novel architecture of a floating-point digital signal processor is presented. It introduces a single hardware structure with a full set of elementary arithmetic functions which includes sin, cos, tan, arctanh, circular rotation and vectoring, sinh, cosh, tanh, arctanh, hyperbolic rotation and vectoring, square root, logarithm, exponential as well as addition, multiplication and division. The architecture of the processor is based on the COordinate Rotation DIgital Computer (CORDIC) and the Convergence Computing Method (CCM) algorithms for computing arithmetic functions and it is fully parallel and pipelined. Its advanced functionality is achieved without significant increase in hardware, in comparison to ordinary CORDIC processor, and makes it an ideal processing element in high speed multiprocessor applications, e.g. real time Digital Signal Processing (DSP) and computer graphics.

entry:
@Article{Metafas:1995:FAC,
  author =       "D. E. Metafas and C. E. Goutis",
  title =        "A Floating-Point Advanced {CORDIC} Processor",
  journal =      j-J-VLSI-SIGNAL-PROC,
  volume =       "10",
  number =       "1",
  pages =        "53--65",
  month =        jun,
  year =         "1995",
  CODEN =        "JVSPED",
  DOI =          "https://doi.org/10.1007/BF02407026",
  ISSN =         "0922-5773 (print), 1573-109x (electronic)",
  ISSN-L =       "0922-5773",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "In this paper, a novel architecture of a
                 floating-point digital signal processor is presented.
                 It introduces a single hardware structure with a full
                 set of elementary arithmetic functions which includes
                 sin, cos, tan, arctanh, circular rotation and
                 vectoring, sinh, cosh, tanh, arctanh, hyperbolic
                 rotation and vectoring, square root, logarithm,
                 exponential as well as addition, multiplication and
                 division. The architecture of the processor is based on
                 the COordinate Rotation DIgital Computer (CORDIC) and
                 the Convergence Computing Method (CCM) algorithms for
                 computing arithmetic functions and it is fully parallel
                 and pipelined. Its advanced functionality is achieved
                 without significant increase in hardware, in comparison
                 to ordinary CORDIC processor, and makes it an ideal
                 processing element in high speed multiprocessor
                 applications, e.g. real time Digital Signal Processing
                 (DSP) and computer graphics.",
  acknowledgement = ack-nhfb,
  fjournal =     "Journal of VLSI Signal Processing",
}


bibtype: inproceedings
filename: fparith.bib
label: Michelucci:1995:ARD
author: D. Michelucci
title: An $ epsilon $ Arithmetic for Removing Degeneracies
crossref: Knowles:1995:PSC
pages: 230--238
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Michelucci.pdf
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: D. Michelucci
rawtitle: An $ \epsilon $ Arithmetic for Removing Degeneracies
entry:
@InProceedings{Michelucci:1995:ARD,
  author =       "D. Michelucci",
  title =        "An $ \epsilon $ Arithmetic for Removing Degeneracies",
  crossref =     "Knowles:1995:PSC",
  pages =        "230--238",
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Michelucci.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: techreport
filename: fparith.bib
label: Miner:1995:DIF
author: Paul S. Miner
title: Defining the IEEE-854 floating-point standard in PVS
number: 110167
address: Hampton, VA, USA
year: 1995
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
series: NASA technical memorandum
keywords: Floating point arithmetic.; Formalism.; Prototypes.; Proving.
acknowledgement: ack-nhfb
rawauthor: Paul S. Miner
rawtitle: Defining the {IEEE-854} floating-point standard in {PVS}
institution:
National Aeronautics and Space Administration, Langley Research Center; National Technical Information Service, distributor

remark:
Distributed to depository libraries in microfiche. Shipping list no.: 96-0033-M. Microfiche. [Washington, D.C.: National Aeronautics and Space Administration, 1995] 1 microfiche.

entry:
@TechReport{Miner:1995:DIF,
  author =       "Paul S. Miner",
  title =        "Defining the {IEEE-854} floating-point standard in
                 {PVS}",
  number =       "110167",
  institution =  "National Aeronautics and Space Administration, Langley
                 Research Center; National Technical Information
                 Service, distributor",
  address =      "Hampton, VA, USA",
  pages =        "????",
  year =         "1995",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  series =       "NASA technical memorandum",
  acknowledgement = ack-nhfb,
  alttitle =     "Defining the IEEE 854 floating point standard in PVS
                 Defining the IEEE eight hundred fifty-four floating
                 point standard in PVS",
  govtdocnumber = "NAS 1.15:110167 0830-D (MF)",
  keywords =     "Floating point arithmetic.; Formalism.; Prototypes.;
                 Proving.",
  remark =       "Distributed to depository libraries in microfiche.
                 Shipping list no.: 96-0033-M. Microfiche. [Washington,
                 D.C.: National Aeronautics and Space Administration,
                 1995] 1 microfiche.",
}


bibtype: techreport
filename: fparith.bib
label: Moler:1995:CCT
author: Cleve B. Moler
type: Technical note
institution: inst-MATHWORKS
address: inst-MATHWORKS:adr
month: Winter
year: 1995
bibdate: Thu Oct 24 07:16:21 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2002.10.24 07:16:21 ???
URL: http://www.mathworks.com/company/newsletter/pdf/win95cleve.pdf
keywords: Matlab; Pentium FDIV divide flaw
acknowledgement: ack-nhfb
rawauthor: Cleve B. Moler
title:
Cleve's Corner: a Tale of Two Numbers: With the Pentium, there is a very small chance of making a very large error

rawtitle:
{Cleve}'s Corner: a Tale of Two Numbers: {With} the {Pentium}, there is a very small chance of making a very large error

entry:
@TechReport{Moler:1995:CCT,
  author =       "Cleve B. Moler",
  title =        "{Cleve}'s Corner: a Tale of Two Numbers: {With} the
                 {Pentium}, there is a very small chance of making a
                 very large error",
  type =         "Technical note",
  institution =  inst-MATHWORKS,
  address =      inst-MATHWORKS:adr,
  month =        "Winter",
  year =         "1995",
  bibdate =      "Thu Oct 24 07:16:21 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.mathworks.com/company/newsletter/pdf/win95cleve.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "Matlab; Pentium FDIV divide flaw",
}


bibtype: article
filename: fparith.bib
label: Moler:1995:TTN
author: Cleve B. Moler
title: A tale of two numbers
journal: j-SIAM-NEWS
volume: 28
number: 1
pages: 16--16
day: 1
month: jan
monthnumber: 1
year: 1995
ISSN: 0036-1437 OR 00361437
ISSNL: 0036-1437 OR 00361437
bibdate: Wed Nov 13 07:16:43 1996
bibtimestamp: 1996.11.13 07:16:43 ???
note: Discusses the Intel Pentium chip divide flaw.
fjournal: SIAM News
acknowledgement: ack-nhfb
journalURL: https://sinews.siam.org/
rawauthor: Cleve B. Moler
rawnote: Discusses the Intel Pentium chip divide flaw.
rawtitle: A tale of two numbers
bibsource:
https://www.math.utah.edu/pub/bibnet/authors/m/moler-cleve-b.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib

entry:
@Article{Moler:1995:TTN,
  author =       "Cleve B. Moler",
  title =        "A tale of two numbers",
  journal =      j-SIAM-NEWS,
  volume =       "28",
  number =       "1",
  pages =        "16--16",
  day =          "1",
  month =        jan,
  year =         "1995",
  ISSN =         "0036-1437",
  ISSN-L =       "0036-1437",
  bibdate =      "Wed Nov 13 07:16:43 1996",
  bibsource =    "https://www.math.utah.edu/pub/bibnet/authors/m/moler-cleve-b.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "Discusses the Intel Pentium chip divide flaw.",
  acknowledgement = ack-nhfb,
  fjournal =     "SIAM News",
  journal-URL =  "https://sinews.siam.org/",
}


bibtype: article
filename: fparith.bib
label: Montuschi:1995:RRI
author: P. Montuschi and L. Ciminiera
journal: j-IEEE-TRANS-COMPUT
volume: 44
number: 1
pages: 144--146
month: jan
monthnumber: 1
year: 1995
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.368000
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Wed Jul 6 08:01:25 MDT 2011
bibtimestamp: 2011.07.06 08:01:25 MDT
note: See cite Montuschi:1993:RIT.
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=368000
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: P. Montuschi and L. Ciminiera
rawnote: See \cite{Montuschi:1993:RIT}.
title:
A remark on ``Reducing iteration time when result digit is zero for radix-$2$ SRT division and square root with redundant remainders''

rawtitle:
A remark on {``Reducing iteration time when result digit is zero for radix-$2$ SRT division and square root with redundant remainders''}

entry:
@Article{Montuschi:1995:RRI,
  author =       "P. Montuschi and L. Ciminiera",
  title =        "A remark on {``Reducing iteration time when result
                 digit is zero for radix-$2$ SRT division and square
                 root with redundant remainders''}",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "44",
  number =       "1",
  pages =        "144--146",
  month =        jan,
  year =         "1995",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.368000",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Wed Jul 6 08:01:25 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  note =         "See \cite{Montuschi:1993:RIT}.",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=368000",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
  summary =      "In a previous paper by P. Montuschi and L. Ciminiera
                 (ibid., vol. 42, no.2 p239-246, Feb 1993), an
                 architecture for shared radix 2 division and square
                 root has been presented whose main characteristic is
                 the ability to avoid any addition/subtraction,
                 \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Muller:1995:SLN
author: Jean-Michel Muller and Arnaud Tisserand and Alexandre Scherbyna
title: Semi-Logarithmic Number Systems
crossref: Knowles:1995:PSC
pages: 201--207
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Muller.pdf
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: Jean-Michel Muller and Arnaud Tisserand and Alexandre Scherbyna
rawtitle: Semi-Logarithmic Number Systems
entry:
@InProceedings{Muller:1995:SLN,
  author =       "Jean-Michel Muller and Arnaud Tisserand and Alexandre
                 Scherbyna",
  title =        "Semi-Logarithmic Number Systems",
  crossref =     "Knowles:1995:PSC",
  pages =        "201--207",
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Muller.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: article
filename: fparith.bib
label: Nielsen:1995:MFD
author: Asger Munk Nielsen and Peter Kornerup
title: MSB-First Digit Serial Arithmetic
journal: j-J-UCS
volume: 1
number: 7
pages: 527--547
day: 28
month: jul
monthnumber: 7
year: 1995
ISSN: 0948-6968 OR 09486968
ISSNL: 0948-6968 OR 09486968
MRclass: 68Mxx
MRnumber: 1 403 711
bibdate: Wed May 28 19:32:35 MDT 1997
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1997.05.28 19:32:35 MDT
URL: http://www.jucs.org/jucs_1_7/msb_first_digit_serial
fjournal: J.UCS: Journal of Universal Computer Science
acknowledgement: ack-nhfb
journalURL: http://www.jucs.org/jucs
rawauthor: Asger Munk Nielsen and Peter Kornerup
rawtitle: {MSB}-First Digit Serial Arithmetic
entry:
@Article{Nielsen:1995:MFD,
  author =       "Asger Munk Nielsen and Peter Kornerup",
  title =        "{MSB}-First Digit Serial Arithmetic",
  journal =      j-J-UCS,
  volume =       "1",
  number =       "7",
  pages =        "527--547",
  day =          "28",
  month =        jul,
  year =         "1995",
  CODEN =        "????",
  ISSN =         "0948-6968",
  ISSN-L =       "0948-6968",
  MRclass =      "68Mxx",
  MRnumber =     "1 403 711",
  bibdate =      "Wed May 28 19:32:35 MDT 1997",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.jucs.org/jucs_1_7/msb_first_digit_serial",
  acknowledgement = ack-nhfb,
  fjournal =     "J.UCS: Journal of Universal Computer Science",
  journal-URL =  "http://www.jucs.org/jucs",
}


bibtype: phdthesis
filename: fparith.bib
label: Nowka:1995:HPC
author: Kevin Nowka
title: High Performance CMOS VLSI System Design Using Wave Pipelining
type: Thesis (Ph.D.)
school: Department of Electrical Engineering, Stanford University
address: Stanford, CA, USA
month: sep
monthnumber: 9
year: 1995
bibdate: Mon Dec 24 11:03:54 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.12.24 11:03:54 ???
acknowledgement: ack-nhfb
rawauthor: Kevin Nowka
rawtitle: High Performance {CMOS} {VLSI} System Design Using Wave Pipelining
entry:
@PhdThesis{Nowka:1995:HPC,
  author =       "Kevin Nowka",
  title =        "High Performance {CMOS} {VLSI} System Design Using
                 Wave Pipelining",
  type =         "Thesis ({Ph.D.})",
  school =       "Department of Electrical Engineering, Stanford
                 University",
  address =      "Stanford, CA, USA",
  pages =        "????",
  month =        sep,
  year =         "1995",
  bibdate =      "Mon Dec 24 11:03:54 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
}


bibtype: techreport
filename: fparith.bib
label: Oberman:1995:DRC
author: S. F. Oberman and M. J. Flynn
title: On division and reciprocal caches
type: Technical Report
number: CSL-TR-95-666
institution: Computer Systems Laboratory, Stanford University
address: Stanford, CA, USA
month: apr
monthnumber: 4
year: 1995
bibdate: Thu Apr 2 08:38:35 1998
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1998.04.02 08:38:35 ???
acknowledgement: ack-sfo
rawauthor: S. F. Oberman and M. J. Flynn
rawtitle: On division and reciprocal caches
entry:
@TechReport{Oberman:1995:DRC,
  author =       "S. F. Oberman and M. J. Flynn",
  title =        "On division and reciprocal caches",
  type =         "Technical Report",
  number =       "CSL-TR-95-666",
  institution =  "Computer Systems Laboratory, Stanford University",
  address =      "Stanford, CA, USA",
  month =        apr,
  year =         "1995",
  bibdate =      "Thu Apr 2 08:38:35 1998",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-sfo # " and " # ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: OGara:1995:SET
journal: j-FORTRAN-FORUM
volume: 14
number: 1
pages: 11--28
month: mar
monthnumber: 3
year: 1995
ISSN: 1061-7264 (print), 1931-1311 (electronic) OR 10617264 (print), 19311311 (electronic)
ISSNL: 1061-7264 OR 10617264
bibdate: Thu Feb 07 06:54:12 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2002.02.07 06:54:12 ???
fjournal: ACM Fortran Forum
acknowledgement: ack-nhfb
journalURL: http://portal.acm.org/toc.cfm?id=J286
issue: 41
author:
Linda O'Gara and Jeanne Adams and Walt Brainerd and Vic Kelson and Craig Dedo and Keith Bierman and Jerry Wagener and Richard Maine and Leonard J. Moss and James H. Billen and Robert Corbett and Dick Hendrickson and Jamie Shiers and David Levine and David L. Epstein and John Reid and Lawrie Schonfelder and Kurt W. Hirchert and Jens Helmers and William Behrman and A. C. Marshall and William B. Clodius

title:
Some Email threads: Is Fortran 90 Succeeding?; Fortran Market Acceptance; Fortran--C Interoperability; Fortran Preprocessors or Conditional Compilation: Is Standardization Needed?; Floating Point Subsets of Enable; Pointers to Procedures, or Procedure Names as Variables; Standard Linear Algebra and Advanced Math Functions Modules; Re: Allocatable arrays in structures; Restricted Module Visibility

rawauthor:
Linda O'Gara and Jeanne Adams and Walt Brainerd and Vic Kelson and Craig Dedo and Keith Bierman and Jerry Wagener and Richard Maine and Leonard J. Moss and James H. Billen and Robert Corbett and Dick Hendrickson and Jamie Shiers and David Levine and David L. Epstein and John Reid and Lawrie Schonfelder and Kurt W. Hirchert and Jens Helmers and William Behrman and A. C. Marshall and William B. Clodius

rawtitle:
Some Email threads: Is {Fortran 90} Succeeding?; {Fortran} Market Acceptance; {Fortran--C} Interoperability; {Fortran} Preprocessors or Conditional Compilation: Is Standardization Needed?; Floating Point Subsets of Enable; Pointers to Procedures, or Procedure Names as Variables; Standard Linear Algebra and Advanced Math Functions Modules; Re: Allocatable arrays in structures; Restricted Module Visibility

entry:
@Article{OGara:1995:SET,
  author =       "Linda O'Gara and Jeanne Adams and Walt Brainerd and
                 Vic Kelson and Craig Dedo and Keith Bierman and Jerry
                 Wagener and Richard Maine and Leonard J. Moss and James
                 H. Billen and Robert Corbett and Dick Hendrickson and
                 Jamie Shiers and David Levine and David L. Epstein and
                 John Reid and Lawrie Schonfelder and Kurt W. Hirchert
                 and Jens Helmers and William Behrman and A. C. Marshall
                 and William B. Clodius",
  title =        "Some Email threads: Is {Fortran 90} Succeeding?;
                 {Fortran} Market Acceptance; {Fortran--C}
                 Interoperability; {Fortran} Preprocessors or
                 Conditional Compilation: Is Standardization Needed?;
                 Floating Point Subsets of Enable; Pointers to
                 Procedures, or Procedure Names as Variables; Standard
                 Linear Algebra and Advanced Math Functions Modules; Re:
                 Allocatable arrays in structures; Restricted Module
                 Visibility",
  journal =      j-FORTRAN-FORUM,
  volume =       "14",
  number =       "1",
  pages =        "11--28",
  month =        mar,
  year =         "1995",
  CODEN =        "????",
  ISSN =         "1061-7264 (print), 1931-1311 (electronic)",
  ISSN-L =       "1061-7264",
  bibdate =      "Thu Feb 07 06:54:12 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "ACM Fortran Forum",
  issue =        "41",
  journal-URL =  "http://portal.acm.org/toc.cfm?id=J286",
}


bibtype: inproceedings
filename: fparith.bib
label: Ohi:1995:RCN
author: Y. Ohi and T. Aoki and T. Higuchi
title: Redundant Complex Number Systems
crossref: IEEE:1995:ISM
pages: 14--??
year: 1995
DOI: https://doi.org/10.1109/ISMVL.1995.513504
bibdate: Sat Aug 22 08:43:14 MDT 2009
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2009.08.22 08:43:14 MDT
acknowledgement: ack-nhfb
rawauthor: Y. Ohi and T. Aoki and T. Higuchi
rawtitle: Redundant Complex Number Systems
abstract:
This paper presents redundant complex number systems (RCNSs)-new complex number representations for high-speed arithmetic circuits. RCNS is a positional number system that has a complex radix $ r_j $ and a digit set $ - alpha , ldots , 0, ldots , alpha $, where $ r geq 2 $ and $ [(r^2 - 1) / 2] < alpha leq r^2 - 1 $. The use of complex radix $ r_j $ allows additions and multiplications of complex numbers to be done without treating real part and imaginary part separately. Also the redundancy in the number representation enables carry-free addition as well as binary-tree multiple-operand addition. This paper discusses the basic arithmetic algorithms of RCNSs and their implementations.

rawabstract:
This paper presents redundant complex number systems (RCNSs)-new complex number representations for high-speed arithmetic circuits. RCNS is a positional number system that has a complex radix $ r_j $ and a digit set $ \{ - \alpha, \ldots {}, 0, \ldots {}, \alpha \} $, where $ r \geq 2 $ and $ [(r^2 - 1) / 2] < \alpha \leq r^2 - 1 $. The use of complex radix $ r_j $ allows additions and multiplications of complex numbers to be done without treating real part and imaginary part separately. Also the redundancy in the number representation enables carry-free addition as well as binary-tree multiple-operand addition. This paper discusses the basic arithmetic algorithms of RCNSs and their implementations.

entry:
@InProceedings{Ohi:1995:RCN,
  author =       "Y. Ohi and T. Aoki and T. Higuchi",
  title =        "Redundant Complex Number Systems",
  crossref =     "IEEE:1995:ISM",
  pages =        "14--??",
  year =         "1995",
  DOI =          "https://doi.org/10.1109/ISMVL.1995.513504",
  bibdate =      "Sat Aug 22 08:43:14 MDT 2009",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "This paper presents redundant complex number systems
                 (RCNSs)-new complex number representations for
                 high-speed arithmetic circuits. RCNS is a positional
                 number system that has a complex radix $ r_j $ and a
                 digit set $ \{ - \alpha, \ldots {}, 0, \ldots {},
                 \alpha \} $, where $ r \geq 2 $ and $ [(r^2 - 1) / 2] <
                 \alpha \leq r^2 - 1 $. The use of complex radix $ r_j $
                 allows additions and multiplications of complex numbers
                 to be done without treating real part and imaginary
                 part separately. Also the redundancy in the number
                 representation enables carry-free addition as well as
                 binary-tree multiple-operand addition. This paper
                 discusses the basic arithmetic algorithms of RCNSs and
                 their implementations.",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Ohkubo:1995:CBM
author: N. Ohkubo and M. Suzuki and T. Shinbo and T. Yamanaka and A. Shimizu and K. Sasaki and Y. Nakagome
title: A 4.4ns CMOS $ 54 times 54 $-b multiplier using pass-transistor multiplexor
journal: j-IEEE-J-SOLID-STATE-CIRCUITS
volume: SC-30
number: 3
pages: 251--257
month: mar
monthnumber: 3
year: 1995
CODEN: IJSCBC
DOI: https://doi.org/10.1109/4.364439
ISSN: 0018-9200 (print), 1558-173X (electronic) OR 00189200 (print), 1558173X (electronic)
ISSNL: 0018-9200 OR 00189200
bibdate: Mon Dec 24 10:23:37 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.12.24 10:23:37 ???
fjournal: IEEE Journal of Solid-State Circuits
acknowledgement: ack-nhfb
rawauthor: N. Ohkubo and M. Suzuki and T. Shinbo and T. Yamanaka and A. Shimizu and K. Sasaki and Y. Nakagome
rawtitle: A 4.4ns {CMOS} $ 54 \times 54 $-b multiplier using pass-transistor multiplexor
entry:
@Article{Ohkubo:1995:CBM,
  author =       "N. Ohkubo and M. Suzuki and T. Shinbo and T. Yamanaka
                 and A. Shimizu and K. Sasaki and Y. Nakagome",
  title =        "A 4.4ns {CMOS} $ 54 \times 54 $-b multiplier using
                 pass-transistor multiplexor",
  journal =      j-IEEE-J-SOLID-STATE-CIRCUITS,
  volume =       "SC-30",
  number =       "3",
  pages =        "251--257",
  month =        mar,
  year =         "1995",
  CODEN =        "IJSCBC",
  DOI =          "https://doi.org/10.1109/4.364439",
  ISSN =         "0018-9200 (print), 1558-173X (electronic)",
  ISSN-L =       "0018-9200",
  bibdate =      "Mon Dec 24 10:23:37 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Journal of Solid-State Circuits",
  xxpages =      "294--305",
}


bibtype: article
filename: fparith.bib
label: OLeary:1995:NRI
author: J. O'Leary and M. Leeser and J. Hickey and M. Aagaard
title: Non-Restoring Integer Square Root: a Case Study in Design by Principled Optimization
journal: j-LECT-NOTES-COMP-SCI
volume: 901
pages: 52--??
year: 1995
CODEN: LNCSD9
ISSN: 0302-9743 (print), 1611-3349 (electronic) OR 03029743 (print), 16113349 (electronic)
ISSNL: 0302-9743 OR 03029743
bibdate: Sat May 11 13:45:32 MDT 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.05.11 13:45:32 MDT
fjournal: Lecture Notes in Computer Science
acknowledgement: ack-nhfb
journalURL: http://link.springer.com/bookseries/558
rawauthor: J. O'Leary and M. Leeser and J. Hickey and M. Aagaard
rawtitle: Non-Restoring Integer Square Root: a Case Study in Design by Principled Optimization
entry:
@Article{OLeary:1995:NRI,
  author =       "J. O'Leary and M. Leeser and J. Hickey and M.
                 Aagaard",
  title =        "Non-Restoring Integer Square Root: a Case Study in
                 Design by Principled Optimization",
  journal =      j-LECT-NOTES-COMP-SCI,
  volume =       "901",
  pages =        "52--??",
  year =         "1995",
  CODEN =        "LNCSD9",
  ISSN =         "0302-9743 (print), 1611-3349 (electronic)",
  ISSN-L =       "0302-9743",
  bibdate =      "Sat May 11 13:45:32 MDT 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "Lecture Notes in Computer Science",
  journal-URL =  "http://link.springer.com/bookseries/558",
}


bibtype: inproceedings
filename: fparith.bib
label: Orup:1995:SQD
author: Holger Orup
title: Simplifying Quotient Determination in High-Radix Modular Multiplication
crossref: Knowles:1995:PSC
pages: 193--200
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Orup.pdf
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: Holger Orup
rawtitle: Simplifying Quotient Determination in High-Radix Modular Multiplication
entry:
@InProceedings{Orup:1995:SQD,
  author =       "Holger Orup",
  title =        "Simplifying Quotient Determination in High-Radix
                 Modular Multiplication",
  crossref =     "Knowles:1995:PSC",
  pages =        "193--200",
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Orup.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: inproceedings
filename: fparith.bib
label: Owens:1995:RNC
author: Robert M. Owens and Raminder S. Bajwa and Mary Jane Irwin
title: Reducing the Number of Counters Needed for Integer Multiplication
crossref: Knowles:1995:PSC
pages: 38--41
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Owens.pdf
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: Robert M. Owens and Raminder S. Bajwa and Mary Jane Irwin
rawtitle: Reducing the Number of Counters Needed for Integer Multiplication
entry:
@InProceedings{Owens:1995:RNC,
  author =       "Robert M. Owens and Raminder S. Bajwa and Mary Jane
                 Irwin",
  title =        "Reducing the Number of Counters Needed for Integer
                 Multiplication",
  crossref =     "Knowles:1995:PSC",
  pages =        "38--41",
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Owens.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: article
filename: fparith.bib
label: Parker:1995:MUP
author: M. G. Parker and M. Benaissa
title: $ mathrm GF(p^m) $ multiplication using polynomial residue number systems
journal: j-IEEE-TRANS-CIRCUITS-SYST-2
volume: 42
number: 11
pages: 718--721
month: nov
monthnumber: 11
year: 1995
CODEN: ICSPE5
DOI: https://doi.org/10.1109/82.475249
ISSN: 1057-7130 (print), 1558-125X (electronic) OR 10577130 (print), 1558125X (electronic)
ISSNL: 1057-7130 OR 10577130
bibdate: Fri Nov 9 11:38:58 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:58 MST
URL: http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=10018
fjournal: IEEE Transactions on Circuits and Systems. 2, Analog and Digital Signal Processing
keywords: residue arithmetic; residue number system
acknowledgement: ack-nhfb
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=82
rawauthor: M. G. Parker and M. Benaissa
rawtitle: {$ \mathrm {GF}(p^m) $} multiplication using polynomial residue number systems
entry:
@Article{Parker:1995:MUP,
  author =       "M. G. Parker and M. Benaissa",
  title =        "{$ \mathrm {GF}(p^m) $} multiplication using
                 polynomial residue number systems",
  journal =      j-IEEE-TRANS-CIRCUITS-SYST-2,
  volume =       "42",
  number =       "11",
  pages =        "718--721",
  month =        nov,
  year =         "1995",
  CODEN =        "ICSPE5",
  DOI =          "https://doi.org/10.1109/82.475249",
  ISSN =         "1057-7130 (print), 1558-125X (electronic)",
  ISSN-L =       "1057-7130",
  bibdate =      "Fri Nov 9 11:38:58 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=10018",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Circuits and Systems. 2, Analog
                 and Digital Signal Processing",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=82",
  keywords =     "residue arithmetic; residue number system",
  summary =      "$\mathrm{GF}(p^m)$ multiplication is computed in two
                 stages. First, the polynomial product is computed
                 modulus: a highly factorizable degree S polynomial,
                 $M(x)$, with $S \geq 2m - 1$. This enables the product
                 to be computed using a polynomial residue number
                 system. \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Popova:1995:FCI
author: E. Popova
title: On a Formally Correct Implementation of IEEE Computer Arithmetic
journal: j-J-UCS
volume: 1
number: 7
pages: 560--??
day: 28
month: jul
monthnumber: 7
year: 1995
ISSN: 0948-6968 OR 09486968
ISSNL: 0948-6968 OR 09486968
bibdate: Wed May 28 19:32:35 MDT 1997
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1997.05.28 19:32:35 MDT
URL: http://www.iicm.edu/jucs_1_7/on_a_formally_correct
fjournal: J.UCS: Journal of Universal Computer Science
acknowledgement: ack-nhfb
journalURL: http://www.jucs.org/jucs
rawauthor: E. Popova
rawtitle: On a Formally Correct Implementation of {IEEE} Computer Arithmetic
entry:
@Article{Popova:1995:FCI,
  author =       "E. Popova",
  title =        "On a Formally Correct Implementation of {IEEE}
                 Computer Arithmetic",
  journal =      j-J-UCS,
  volume =       "1",
  number =       "7",
  pages =        "560--??",
  day =          "28",
  month =        jul,
  year =         "1995",
  CODEN =        "????",
  ISSN =         "0948-6968",
  ISSN-L =       "0948-6968",
  bibdate =      "Wed May 28 19:32:35 MDT 1997",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.iicm.edu/jucs_1_7/on_a_formally_correct",
  acknowledgement = ack-nhfb,
  fjournal =     "J.UCS: Journal of Universal Computer Science",
  journal-URL =  "http://www.jucs.org/jucs",
}


bibtype: article
filename: fparith.bib
label: Posch:1995:MRRa
author: Karl C. Posch and Reinhard Posch
title: Modulo Reduction in Residue Number Systems
journal: j-IEEE-TRANS-PAR-DIST-SYS
volume: 6
number: 5
pages: 449--454
month: may
monthnumber: 5
year: 1995
CODEN: ITDSEO
DOI: https://doi.org/10.1109/71.382314
ISSN: 1045-9219 (print), 1558-2183 (electronic) OR 10459219 (print), 15582183 (electronic)
ISSNL: 1045-9219 OR 10459219
bibdate: Fri Nov 9 11:38:58 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:58 MST
URL: http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=8666
fjournal: IEEE Transactions on Parallel and Distributed Systems
acknowledgement: ack-nhfb
corpsource: Inst. for Appl. Inf. Process., Graz University of Technol., Austria
journalURL: http://www.computer.org/tpds/archives.htm
journalabr: IEEE Trans Parallel Distrib Syst
treatment: T Theoretical or Mathematical
rawauthor: Karl C. Posch and Reinhard Posch
rawtitle: Modulo Reduction in Residue Number Systems
keywords:
Approximation theory; Carry free operations; complexity; computational complexity; Computational complexity; Computer arithmetic; Computer hardware; Cryptography; cryptography; Digital arithmetic; Distributed computer systems; distributed systems; extremely long; integer arithmetic; Iterative methods; Long integer arithmetic; Modulo reduction; modulo reduction; number systems; Number theory; Parallel algorithms; parallel algorithms; parallel implementations; Parallel processing systems; residue arithmetic; Residue number systems; residue number systems

entry:
@Article{Posch:1995:MRRa,
  author =       "Karl C. Posch and Reinhard Posch",
  title =        "Modulo Reduction in Residue Number Systems",
  journal =      j-IEEE-TRANS-PAR-DIST-SYS,
  volume =       "6",
  number =       "5",
  pages =        "449--454",
  month =        may,
  year =         "1995",
  CODEN =        "ITDSEO",
  DOI =          "https://doi.org/10.1109/71.382314",
  ISSN =         "1045-9219 (print), 1558-2183 (electronic)",
  ISSN-L =       "1045-9219",
  bibdate =      "Fri Nov 9 11:38:58 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=8666",
  acknowledgement = ack-nhfb,
  classification = "721.1; 722.4; 723.1; 723.2; 921.6; C4240C
                 (Computational complexity); C4240P (Parallel
                 programming and algorithm theory); C5230 (Digital
                 arithmetic methods); C6110P (Parallel programming)",
  corpsource =   "Inst. for Appl. Inf. Process., Graz University of
                 Technol., Austria",
  fjournal =     "IEEE Transactions on Parallel and Distributed
                 Systems",
  journal-URL =  "http://www.computer.org/tpds/archives.htm",
  journalabr =   "IEEE Trans Parallel Distrib Syst",
  keywords =     "Approximation theory; Carry free operations;
                 complexity; computational complexity; Computational
                 complexity; Computer arithmetic; Computer hardware;
                 Cryptography; cryptography; Digital arithmetic;
                 Distributed computer systems; distributed systems;
                 extremely long; integer arithmetic; Iterative methods;
                 Long integer arithmetic; Modulo reduction; modulo
                 reduction; number systems; Number theory; Parallel
                 algorithms; parallel algorithms; parallel
                 implementations; Parallel processing systems; residue
                 arithmetic; Residue number systems; residue number
                 systems",
  summary =      "Residue number systems provide a good means for
                 extremely long integer arithmetic. Their carry-free
                 operations make parallel implementations feasible. Some
                 applications involving very long integers, such as
                 public key encryption, rely heavily on \ldots{}",
  treatment =    "T Theoretical or Mathematical",
}


bibtype: article
filename: fparith.bib
label: Posch:1995:MRRb
author: K. C. Posch and R. Posch
title: Modulo reduction in residue number systems
journal: j-IEEE-TRANS-PAR-DIST-SYS
volume: 6
number: 5
pages: 449--454
month: may
monthnumber: 5
year: 1995
CODEN: ITDSEO
DOI: https://doi.org/10.1109/71.382314
ISSN: 1045-9219 (print), 1558-2183 (electronic) OR 10459219 (print), 15582183 (electronic)
ISSNL: 1045-9219 OR 10459219
bibdate: Fri Nov 9 11:38:58 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:58 MST
URL: http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=8666
fjournal: IEEE Transactions on Parallel and Distributed Systems
acknowledgement: ack-nhfb
affiliation: Graz Univ of Technology
affiliationaddress: Graz, Austria
corpsource: Inst. for Appl. Inf. Process., Graz University of Technol., Austria
journalURL: http://www.computer.org/tpds/archives.htm
journalabr: IEEE Trans Parallel Distrib Syst
treatment: T Theoretical or Mathematical
rawauthor: K. C. Posch and R. Posch
rawtitle: Modulo reduction in residue number systems
keywords:
Approximation theory; Carry free operations; complexity; computational complexity; Computational complexity; Computer arithmetic; Computer hardware; Cryptography; cryptography; Digital arithmetic; Distributed computer systems; distributed systems; extremely long; integer arithmetic; Iterative methods; Long integer arithmetic; Modulo reduction; modulo reduction; number systems; Number theory; Parallel algorithms; parallel algorithms; parallel implementations; Parallel processing systems; residue; Residue number systems; residue number systems

entry:
@Article{Posch:1995:MRRb,
  author =       "K. C. Posch and R. Posch",
  title =        "Modulo reduction in residue number systems",
  journal =      j-IEEE-TRANS-PAR-DIST-SYS,
  volume =       "6",
  number =       "5",
  pages =        "449--454",
  month =        may,
  year =         "1995",
  CODEN =        "ITDSEO",
  DOI =          "https://doi.org/10.1109/71.382314",
  ISSN =         "1045-9219 (print), 1558-2183 (electronic)",
  ISSN-L =       "1045-9219",
  bibdate =      "Fri Nov 9 11:38:58 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=8666",
  acknowledgement = ack-nhfb,
  affiliation =  "Graz Univ of Technology",
  affiliationaddress = "Graz, Austria",
  classification = "721.1; 722.4; 723.1; 723.2; 921.6; C4240C
                 (Computational complexity); C4240P (Parallel
                 programming and algorithm theory); C5230 (Digital
                 arithmetic methods); C6110P (Parallel programming)",
  corpsource =   "Inst. for Appl. Inf. Process., Graz University of
                 Technol., Austria",
  fjournal =     "IEEE Transactions on Parallel and Distributed
                 Systems",
  journal-URL =  "http://www.computer.org/tpds/archives.htm",
  journalabr =   "IEEE Trans Parallel Distrib Syst",
  keywords =     "Approximation theory; Carry free operations;
                 complexity; computational complexity; Computational
                 complexity; Computer arithmetic; Computer hardware;
                 Cryptography; cryptography; Digital arithmetic;
                 Distributed computer systems; distributed systems;
                 extremely long; integer arithmetic; Iterative methods;
                 Long integer arithmetic; Modulo reduction; modulo
                 reduction; number systems; Number theory; Parallel
                 algorithms; parallel algorithms; parallel
                 implementations; Parallel processing systems; residue;
                 Residue number systems; residue number systems",
  summary =      "Residue number systems provide a good means for
                 extremely long integer arithmetic. Their carry-free
                 operations make parallel implementations feasible. Some
                 applications involving very long integers, such as
                 public key encryption, rely heavily on \ldots{}",
  treatment =    "T Theoretical or Mathematical",
}


bibtype: inproceedings
filename: fparith.bib
label: Prabhu:1995:MRD
author: J. A. Prabhu and G. B. Zyner
title: 167 MHz Radix-$8$ Divide and Square Root Using Overlapped Radix-$2$ Stages
crossref: Knowles:1995:PSC
pages: 155--162
year: 1995
bibdate: Sat Jul 16 15:28:14 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2005.07.16 15:28:14 MDT
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: J. A. Prabhu and G. B. Zyner
rawtitle: {167 MHz} Radix-$8$ Divide and Square Root Using Overlapped Radix-$2$ Stages
entry:
@InProceedings{Prabhu:1995:MRD,
  author =       "J. A. Prabhu and G. B. Zyner",
  title =        "{167 MHz} Radix-$8$ Divide and Square Root Using
                 Overlapped Radix-$2$ Stages",
  crossref =     "Knowles:1995:PSC",
  pages =        "155--162",
  year =         "1995",
  bibdate =      "Sat Jul 16 15:28:14 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
  summary =      "UltraSPARC's IEEE-754 compliant floating point divide
                 and square root implementation is presented. Three
                 overlapping stages of SRT radix-$2$ quotient selection
                 logic enable an effective radix-$8$ calculation at 167
                 MHz while only a single radix-$2$ \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Prabhu:1995:MRF
author: J. Arjun Prabhu and Gregory B. Zyner
title: 167 MHz Radix-8 floating point divide and square root using overlapped radix-2 stages
crossref: Knowles:1995:PSC
pages: 155--162
month: jul
monthnumber: 7
year: 1995
bibdate: Thu Apr 2 08:38:35 1998
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1998.04.02 08:38:35 ???
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Prabhu.pdf
keywords: ARITH-12; UltraSPARC
acknowledgement: ack-sfo
rawauthor: J. Arjun Prabhu and Gregory B. Zyner
rawtitle: 167 {MHz} Radix-8 floating point divide and square root using overlapped radix-2 stages
entry:
@InProceedings{Prabhu:1995:MRF,
  author =       "J. Arjun Prabhu and Gregory B. Zyner",
  title =        "167 {MHz} Radix-8 floating point divide and square
                 root using overlapped radix-2 stages",
  crossref =     "Knowles:1995:PSC",
  month =        jul,
  year =         "1995",
  bibdate =      "Thu Apr 2 08:38:35 1998",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Prabhu.pdf",
  acknowledgement = ack-sfo # " and " # ack-nhfb,
  keywords =     "ARITH-12; UltraSPARC",
}


bibtype: article
filename: fparith.bib
label: Pratt:1995:APB
author: V. Pratt
title: Anatomy of the Pentium Bug
journal: j-LECT-NOTES-COMP-SCI
volume: 915
pages: 97--107
year: 1995
CODEN: LNCSD9
ISSN: 0302-9743 (print), 1611-3349 (electronic) OR 03029743 (print), 16113349 (electronic)
ISSNL: 0302-9743 OR 03029743
bibdate: Sat May 11 13:45:32 MDT 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.05.11 13:45:32 MDT
URL: ftp://boole.stanford.edu/pub/FDIV/anapent.ps.gz
fjournal: Lecture Notes in Computer Science
keywords: Intel Pentium divide flaw; Thomas R. Nicely
acknowledgement: ack-nhfb
journalURL: http://link.springer.com/bookseries/558
rawauthor: V. Pratt
rawtitle: Anatomy of the {Pentium} Bug
entry:
@Article{Pratt:1995:APB,
  author =       "V. Pratt",
  title =        "Anatomy of the {Pentium} Bug",
  journal =      j-LECT-NOTES-COMP-SCI,
  volume =       "915",
  pages =        "97--107",
  year =         "1995",
  CODEN =        "LNCSD9",
  ISSN =         "0302-9743 (print), 1611-3349 (electronic)",
  ISSN-L =       "0302-9743",
  bibdate =      "Sat May 11 13:45:32 MDT 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "ftp://boole.stanford.edu/pub/FDIV/anapent.ps.gz",
  acknowledgement = ack-nhfb,
  fjournal =     "Lecture Notes in Computer Science",
  journal-URL =  "http://link.springer.com/bookseries/558",
  keywords =     "Intel Pentium divide flaw; Thomas R. Nicely",
}


bibtype: article
filename: fparith.bib
label: Price:1995:PFF
author: Dick Price
title: Pentium FDIV Flaw --- Lessons Learned
journal: j-IEEE-MICRO
volume: 15
number: 2
pages: 88, 86--87
month: mar
monthnumber: 3
year: 1995
CODEN: IEMIDZ
ISSN: 0272-1732 (print), 1937-4143 (electronic) OR 02721732 (print), 19374143 (electronic)
ISSNL: 0272-1732 OR 02721732
bibdate: Thu Dec 14 06:08:58 MST 2000
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; Science Citation Index database (1980--2000)
bibtimestamp: 2000.12.14 06:08:58 MST
URL: http://ieeexplore.ieee.org/iel1/40/8521/00372360.pdf
fjournal: IEEE Micro
acknowledgement: ack-nhfb
journalURL: http://www.computer.org/csdl/mags/mi/index.html
thesaurus: Computer testing; Floating point arithmetic; Integrated circuit testing
treatment: G General Review
rawauthor: Dick Price
rawtitle: {Pentium FDIV} Flaw --- Lessons Learned
abstract:
As the tidal wave of publicity surrounding the Pentium floating-point divide bug subsides, questions about the controversy's lasting impact linger. Intel's competitors may rejoice at the industry giant's technical and public relations missteps, but they too must worry about damage done to customer confidence, shuddering at the prospect of taking a similar public pratfall. And consumers, justified or not, have new reliability worries with every new product release. Intel recently adopted a `no questions asked' replacement policy for defective Pentium chips, reversing its earlier stance. As part of a new commitment to openness, Intel has posted a variety of documents on its World Wide Web home page (http://www.intel.com) describing the flaw, analysing its severity, and providing replacement procedures. Industry observers have pointed to the benefits that will come from Intel's woes: more openness by manufacturers, better understanding among consumers of the problems facing chip makers, and greater emphasis on testing. For chip makers and computer users alike, it remains then to calculate the lessons learned.

keywords:
Chip makers; chip makers; circuit testing; computer testing; Defective Pentium chips; defective Pentium chips; floating point arithmetic; integrated; Intel; Intel Pentium divide flaw; Pentium floating-point divide bug; reliability; Reliability; replacement procedures; Replacement procedures; Thomas R. Nicely

classcodes:
B1265F (Microprocessors and microcomputers); C5130 (Microprocessor chips); C5470 (Performance evaluation and testing); C5230 (Digital arithmetic methods)

rawabstract:
As the tidal wave of publicity surrounding the Pentium floating-point divide bug subsides, questions about the controversy's lasting impact linger. Intel's competitors may rejoice at the industry giant's technical and public relations missteps, but they too must worry about damage done to customer confidence, shuddering at the prospect of taking a similar public pratfall. And consumers, justified or not, have new reliability worries with every new product release. Intel recently adopted a `no questions asked' replacement policy for defective Pentium chips, reversing its earlier stance. As part of a new commitment to openness, Intel has posted a variety of documents on its World Wide Web home page (http://www.intel.com) describing the flaw, analysing its severity, and providing replacement procedures. Industry observers have pointed to the benefits that will come from Intel's woes: more openness by manufacturers, better understanding among consumers of the problems facing chip makers, and greater emphasis on testing. For chip makers and computer users alike, it remains then to calculate the lessons learned.

entry:
@Article{Price:1995:PFF,
  author =       "Dick Price",
  title =        "{Pentium FDIV} Flaw --- Lessons Learned",
  journal =      j-IEEE-MICRO,
  volume =       "15",
  number =       "2",
  pages =        "88, 86--87",
  month =        mar # "\slash " # apr,
  year =         "1995",
  CODEN =        "IEMIDZ",
  ISSN =         "0272-1732 (print), 1937-4143 (electronic)",
  ISSN-L =       "0272-1732",
  bibdate =      "Thu Dec 14 06:08:58 MST 2000",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 Science Citation Index database (1980--2000)",
  URL =          "http://ieeexplore.ieee.org/iel1/40/8521/00372360.pdf",
  abstract =     "As the tidal wave of publicity surrounding the Pentium
                 floating-point divide bug subsides, questions about the
                 controversy's lasting impact linger. Intel's
                 competitors may rejoice at the industry giant's
                 technical and public relations missteps, but they too
                 must worry about damage done to customer confidence,
                 shuddering at the prospect of taking a similar public
                 pratfall. And consumers, justified or not, have new
                 reliability worries with every new product release.
                 Intel recently adopted a `no questions asked'
                 replacement policy for defective Pentium chips,
                 reversing its earlier stance. As part of a new
                 commitment to openness, Intel has posted a variety of
                 documents on its World Wide Web home page
                 (http://www.intel.com) describing the flaw, analysing
                 its severity, and providing replacement procedures.
                 Industry observers have pointed to the benefits that
                 will come from Intel's woes: more openness by
                 manufacturers, better understanding among consumers of
                 the problems facing chip makers, and greater emphasis
                 on testing. For chip makers and computer users alike,
                 it remains then to calculate the lessons learned.",
  acknowledgement = ack-nhfb,
  classcodes =   "B1265F (Microprocessors and microcomputers); C5130
                 (Microprocessor chips); C5470 (Performance evaluation
                 and testing); C5230 (Digital arithmetic methods)",
  classification = "B1265F (Microprocessors and microcomputers); C5130
                 (Microprocessor chips); C5230 (Digital arithmetic
                 methods); C5470 (Performance evaluation and testing)",
  fjournal =     "IEEE Micro",
  journal-URL =  "http://www.computer.org/csdl/mags/mi/index.html",
  keywords =     "Chip makers; chip makers; circuit testing; computer
                 testing; Defective Pentium chips; defective Pentium
                 chips; floating point arithmetic; integrated; Intel;
                 Intel Pentium divide flaw; Pentium floating-point
                 divide bug; reliability; Reliability; replacement
                 procedures; Replacement procedures; Thomas R. Nicely",
  thesaurus =    "Computer testing; Floating point arithmetic;
                 Integrated circuit testing",
  treatment =    "G General Review",
}


bibtype: article
filename: fparith.bib
label: Rogers:1995:UMP
author: John Rogers
title: Using the Multiple Precision Library
journal: j-DDJ
volume: 20
number: 1
pages: 36, 38, 40, 42, 86, 88--89
month: jan
monthnumber: 1
year: 1995
CODEN: DDJOEB
ISSN: 1044-789X OR 1044789X
bibdate: Mon Sep 2 09:09:39 MDT 1996
bibtimestamp: 1996.09.02 09:09:39 MDT
fjournal: Dr. Dobb's Journal of Software Tools
acknowledgement: ack-nhfb
thesaurus: C language; Software libraries; Software portability; Subroutines; Unix
rawauthor: John Rogers
rawtitle: Using the Multiple Precision Library
abstract:
Although most implementations of C boast 32-bit integer arithmetic, many applications are beginning to require higher precision. However, even the IEEE double-precision floating-point format only gives 15 digits of precision. What is needed is a way to deal with multiple-precision integers, independent of the machine's word size. The multiple precision (MP) integer library available with UNIX V7, UNIX SVR4, 4.3BSD, and other versions of UNIX provide infinite precision signed integer operations for C programs. I have also ported the GMP library to Windows NT. In this article, I describe how to use the scantily documented MP routines, along with providing sample code, portability information, some MP helpers, and a few other hints.

keywords:
4.3BSD; C; C programs; GMP library; IEEE double-precision floating-point format; Infinite precision signed integer operations; Integer arithmetic; MP routines; Multiple precision library; Multiple-precision integers; Portability; UNIX; UNIX SVR4; UNIX V7; Windows NT; Word size

rawabstract:
Although most implementations of C boast 32-bit integer arithmetic, many applications are beginning to require higher precision. However, even the IEEE double-precision floating-point format only gives 15 digits of precision. What is needed is a way to deal with multiple-precision integers, independent of the machine's word size. The multiple precision (MP) integer library available with UNIX V7, UNIX SVR4, 4.3BSD, and other versions of UNIX provide infinite precision signed integer operations for C programs. I have also ported the GMP library to Windows NT. In this article, I describe how to use the scantily documented MP routines, along with providing sample code, portability information, some MP helpers, and a few other hints.

entry:
@Article{Rogers:1995:UMP,
  author =       "John Rogers",
  title =        "Using the Multiple Precision Library",
  journal =      j-DDJ,
  volume =       "20",
  number =       "1",
  pages =        "36, 38, 40, 42, 86, 88--89",
  month =        jan,
  year =         "1995",
  CODEN =        "DDJOEB",
  ISSN =         "1044-789X",
  bibdate =      "Mon Sep 2 09:09:39 MDT 1996",
  bibsource =    "http://www.ddj.com/index/author/index.htm;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 UnCover database",
  abstract =     "Although most implementations of C boast 32-bit
                 integer arithmetic, many applications are beginning to
                 require higher precision. However, even the IEEE
                 double-precision floating-point format only gives 15
                 digits of precision. What is needed is a way to deal
                 with multiple-precision integers, independent of the
                 machine's word size. The multiple precision (MP)
                 integer library available with UNIX V7, UNIX SVR4,
                 4.3BSD, and other versions of UNIX provide infinite
                 precision signed integer operations for C programs. I
                 have also ported the GMP library to Windows NT. In this
                 article, I describe how to use the scantily documented
                 MP routines, along with providing sample code,
                 portability information, some MP helpers, and a few
                 other hints.",
  acknowledgement = ack-nhfb,
  classification = "C6110B (Software engineering techniques); C6140D
                 (High level languages)",
  fjournal =     "Dr. Dobb's Journal of Software Tools",
  keywords =     "4.3BSD; C; C programs; GMP library; IEEE
                 double-precision floating-point format; Infinite
                 precision signed integer operations; Integer
                 arithmetic; MP routines; Multiple precision library;
                 Multiple-precision integers; Portability; UNIX; UNIX
                 SVR4; UNIX V7; Windows NT; Word size",
  thesaurus =    "C language; Software libraries; Software portability;
                 Subroutines; Unix",
}


bibtype: article
filename: fparith.bib
label: Rubenking:1995:UNI
author: Neil J. Rubenking
journal: j-PC-MAGAZINE
volume: 14
number: 20
pages: 293--??
year: 1995
CODEN: PCMGEP
ISSN: 0888-8507 (print), 1078-8085 (electronic) OR 08888507 (print), 10788085 (electronic)
ISSNL: 0888-8507 OR 08888507
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
fjournal: PC Magazine
acknowledgement: ack-nhfb
rawauthor: Neil J. Rubenking
title:
User-to-User --- The natural imperfection of floating-point calculations; customizing the Windows 95 boot process; providing a way for the user to exit

rawtitle:
User-to-User --- The natural imperfection of floating-point calculations; customizing the {Windows} 95 boot process; providing a way for the user to exit

entry:
@Article{Rubenking:1995:UNI,
  author =       "Neil J. Rubenking",
  title =        "User-to-User --- The natural imperfection of
                 floating-point calculations; customizing the {Windows}
                 95 boot process; providing a way for the user to exit",
  journal =      j-PC-MAGAZINE,
  volume =       "14",
  number =       "20",
  pages =        "293--??",
  year =         "1995",
  CODEN =        "PCMGEP",
  ISSN =         "0888-8507 (print), 1078-8085 (electronic)",
  ISSN-L =       "0888-8507",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "PC Magazine",
}


bibtype: article
filename: fparith.bib
label: Sammut:1995:AUD
author: K. M. Sammut and S. R. Jones
title: Arithmetic unit design for neural accelerators: cost performance issues
journal: j-IEEE-TRANS-COMPUT
volume: 44
number: 10
pages: 1256--1260
month: oct
monthnumber: 10
year: 1995
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.467702
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Wed Jul 6 08:01:30 MDT 2011
bibtimestamp: 2011.07.06 08:01:30 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=467702
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: K. M. Sammut and S. R. Jones
rawtitle: Arithmetic unit design for neural accelerators: cost performance issues
entry:
@Article{Sammut:1995:AUD,
  author =       "K. M. Sammut and S. R. Jones",
  title =        "Arithmetic unit design for neural accelerators: cost
                 performance issues",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "44",
  number =       "10",
  pages =        "1256--1260",
  month =        oct,
  year =         "1995",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.467702",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Wed Jul 6 08:01:30 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=467702",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: inproceedings
filename: fparith.bib
label: Sangwine:1995:CIT
author: S. J. Sangwine and D. A. Riach
title: Colour image thresholding at pixel rate using rational arithmetic hardware
publisher: pub-IEE
address: pub-IEE:adr
pages: 828--832
year: 1995
ISBN: 0-85296-642-3 OR 0852966423
ISBN13: 978-0-85296-642-6 OR 9780852966426
LCCN: A1632 .I553 1995
bibdate: Fri Nov 30 07:37:21 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.30 07:37:21 ???
acknowledgement: ack-nhfb
rawauthor: S. J. Sangwine and D. A. Riach
rawtitle: Colour image thresholding at pixel rate using rational arithmetic hardware
booktitle:
Fifth International Conference on Image Processing and its Applications: 4-6 July 1995: venue, Heriot-Watt University, Edinburgh, UK

abstract:
Thresholding of images is a common precursor to many object recognition or image analysis methods. Colours images contain more information than monochrome images of the same spatial resolution and in many applications of colour image processing there will be a need for thresholding. The paper presents a hardware implementation and development of a technique published by Pritchard et al. (1994). A brief review is given of the rational arithmetic representation; the authors then discuss the definition of colour purity, present a description of the thresholding algorithm as implemented in hardware and finally, give a block-level description of the hardware implementation and some results obtained

rawabstract:
Thresholding of images is a common precursor to many object recognition or image analysis methods. Colours images contain more information than monochrome images of the same spatial resolution and in many applications of colour image processing there will be a need for thresholding. The paper presents a hardware implementation and development of a technique published by Pritchard et al. (1994). A brief review is given of the rational arithmetic representation; the authors then discuss the definition of colour purity, present a description of the thresholding algorithm as implemented in hardware and finally, give a block-level description of the hardware implementation and some results obtained

rawbooktitle:
{Fifth International Conference on Image Processing and its Applications: 4-6 July 1995: venue, Heriot-Watt University, Edinburgh, UK}

entry:
@InProceedings{Sangwine:1995:CIT,
  author =       "S. J. Sangwine and D. A. Riach",
  booktitle =    "{Fifth International Conference on Image Processing
                 and its Applications: 4-6 July 1995: venue, Heriot-Watt
                 University, Edinburgh, UK}",
  title =        "Colour image thresholding at pixel rate using rational
                 arithmetic hardware",
  publisher =    pub-IEE,
  address =      pub-IEE:adr,
  pages =        "828--832",
  year =         "1995",
  ISBN =         "0-85296-642-3",
  ISBN-13 =      "978-0-85296-642-6",
  LCCN =         "A1632 .I553 1995",
  bibdate =      "Fri Nov 30 07:37:21 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "Thresholding of images is a common precursor to many
                 object recognition or image analysis methods. Colours
                 images contain more information than monochrome images
                 of the same spatial resolution and in many applications
                 of colour image processing there will be a need for
                 thresholding. The paper presents a hardware
                 implementation and development of a technique published
                 by Pritchard et al. (1994). A brief review is given of
                 the rational arithmetic representation; the authors
                 then discuss the definition of colour purity, present a
                 description of the thresholding algorithm as
                 implemented in hardware and finally, give a block-level
                 description of the hardware implementation and some
                 results obtained",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Sanyal:1995:CAS
author: S. Sanyal
title: Computer Arithmetic Systems
journal: j-COMP-J
volume: 38
number: 1
pages: 79--79
year: 1995
CODEN: CMPJA6
DOI: https://doi.org/10.1093/comjnl/38.1.79
ISSN: 0010-4620 (print), 1460-2067 (electronic) OR 00104620 (print), 14602067 (electronic)
ISSNL: 0010-4620 OR 00104620
bibdate: Tue Dec 4 14:48:43 MST 2012
bibtimestamp: 2012.12.04 14:48:43 MST
URL: http://comjnl.oxfordjournals.org/content/38/1/79.full.pdf+html
fjournal: The Computer Journal
acknowledgement: ack-nhfb
journalURL: http://comjnl.oxfordjournals.org/
rawauthor: S. Sanyal
rawtitle: Computer Arithmetic Systems
bibsource:
http://comjnl.oxfordjournals.org/content/38/1.toc; https://www.math.utah.edu/pub/tex/bib/compj1990.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib

entry:
@Article{Sanyal:1995:CAS,
  author =       "S. Sanyal",
  title =        "Computer Arithmetic Systems",
  journal =      j-COMP-J,
  volume =       "38",
  number =       "1",
  pages =        "79--79",
  month =        "????",
  year =         "1995",
  CODEN =        "CMPJA6",
  DOI =          "https://doi.org/10.1093/comjnl/38.1.79",
  ISSN =         "0010-4620 (print), 1460-2067 (electronic)",
  ISSN-L =       "0010-4620",
  bibdate =      "Tue Dec 4 14:48:43 MST 2012",
  bibsource =    "http://comjnl.oxfordjournals.org/content/38/1.toc;
                 https://www.math.utah.edu/pub/tex/bib/compj1990.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://comjnl.oxfordjournals.org/content/38/1/79.full.pdf+html",
  acknowledgement = ack-nhfb,
  fjournal =     "The Computer Journal",
  journal-URL =  "http://comjnl.oxfordjournals.org/",
}


bibtype: inproceedings
filename: fparith.bib
label: Sarma:1995:FBR
author: Debjit Das Sarma and David W. Matula
title: Faithful Bipartite ROM Reciprocal Tables
crossref: Knowles:1995:PSC
pages: 17--29
month: jul
monthnumber: 7
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Sarma.pdf
keywords: ARITH-12
acknowledgement: ack-sfo
rawauthor: Debjit Das Sarma and David W. Matula
rawtitle: Faithful Bipartite {ROM} Reciprocal Tables
entry:
@InProceedings{Sarma:1995:FBR,
  author =       "Debjit Das Sarma and David W. Matula",
  title =        "Faithful Bipartite {ROM} Reciprocal Tables",
  crossref =     "Knowles:1995:PSC",
  pages =        "17--29",
  month =        jul,
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Sarma.pdf",
  acknowledgement = ack-sfo # " and " # ack-nhfb,
  keywords =     "ARITH-12",
  xxnote =       "Check: page 29 is missing from PDF file; is it
                 blank?",
  xxpages =      "17--28??",
}


bibtype: inproceedings
filename: fparith.bib
label: Schulte:1995:DAV
author: M. J. Schulte and E. E. Swartzlander, Jr.
title: Design and applications for variable-precision, interval arithmetic coprocessors
crossref: Kearfott:1996:AICa
pages: 166--172
year: 1995
bibdate: Tue Apr 07 16:25:50 1998
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1998.04.07 16:25:50 ???
acknowledgement: ack-nhfb
rawauthor: M. J. Schulte and E. E. {Swartzlander, Jr.}
rawtitle: Design and applications for variable-precision, interval arithmetic coprocessors
entry:
@InProceedings{Schulte:1995:DAV,
  author =       "M. J. Schulte and E. E. {Swartzlander, Jr.}",
  title =        "Design and applications for variable-precision,
                 interval arithmetic coprocessors",
  crossref =     "Kearfott:1996:AICa",
  pages =        "166--172",
  year =         "1995",
  bibdate =      "Tue Apr 07 16:25:50 1998",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb # " and " # ack-jf,
}


bibtype: inproceedings
filename: fparith.bib
label: Schulte:1995:HDA
author: Michael J. Schulte and Eearl E. Swartzlander, Jr.
title: Hardware Design and Arithmetic Algorithms for a Variable-Precision, Interval Arithmetic Coprocessor
crossref: Knowles:1995:PSC
pages: 222--229
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: Michael J. Schulte and Eearl E. {Swartzlander, Jr.}
rawtitle: Hardware Design and Arithmetic Algorithms for a Variable-Precision, Interval Arithmetic Coprocessor
URL:
http://mesa.ece.wisc.edu/publications/cp_1995-03.pdf; http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Schulte.pdf

entry:
@InProceedings{Schulte:1995:HDA,
  author =       "Michael J. Schulte and Eearl E. {Swartzlander, Jr.}",
  title =        "Hardware Design and Arithmetic Algorithms for a
                 Variable-Precision, Interval Arithmetic Coprocessor",
  crossref =     "Knowles:1995:PSC",
  pages =        "222--229",
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://mesa.ece.wisc.edu/publications/cp_1995-03.pdf;
                 http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Schulte.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: inproceedings
filename: fparith.bib
label: Schulte:1995:PSI
author: Michael J. Schulte and Eearl E. Swartzlander, Jr.
title: A Processor for Staggered Interval Arithmetic
crossref: Cappello:1995:ICA
pages: 104--112
year: 1995
bibdate: Mon Oct 20 07:16:07 MDT 1997
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1997.10.20 07:16:07 MDT
URL: http://mesa.ece.wisc.edu/publications/cp_1995-02.pdf
acknowledgement: ack-nhfb
rawauthor: Michael J. Schulte and Eearl E. {Swartzlander, Jr.}
rawtitle: A Processor for Staggered Interval Arithmetic
entry:
@InProceedings{Schulte:1995:PSI,
  author =       "Michael J. Schulte and Eearl E. {Swartzlander, Jr.}",
  title =        "A Processor for Staggered Interval Arithmetic",
  crossref =     "Cappello:1995:ICA",
  pages =        "104--112",
  year =         "1995",
  bibdate =      "Mon Oct 20 07:16:07 MDT 1997",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://mesa.ece.wisc.edu/publications/cp_1995-02.pdf",
  acknowledgement = ack-nhfb,
}


bibtype: inproceedings
filename: fparith.bib
label: Schwarz:1995:RQC
author: E. M. Schwarz
title: Rounding for quadratically converging algorithms for division and square root
crossref: Singh:1995:CRT
volume: 1
pages: 600--603
month: oct
monthnumber: 10
year: 1995
bibdate: Sat Jul 16 15:28:14 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 15:28:14 MDT
acknowledgement: ack-sfo
rawauthor: E. M. Schwarz
rawtitle: Rounding for quadratically converging algorithms for division and square root
entry:
@InProceedings{Schwarz:1995:RQC,
  author =       "E. M. Schwarz",
  title =        "Rounding for quadratically converging algorithms for
                 division and square root",
  crossref =     "Singh:1995:CRT",
  volume =       "1",
  pages =        "600--603",
  month =        oct,
  year =         "1995",
  bibdate =      "Sat Jul 16 15:28:14 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-sfo # " and " # ack-nhfb,
  summary =      "Exactly rounded results are necessary for many
                 architectures such as IEEE 754 standard. For division
                 and square root, rounding is easy to perform if a
                 remainder is available. But for quadratically
                 converging algorithms, the remainder is not \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Shirazi:1995:QAF
author: N. Shirazi and A. Walters and P. Athanas
title: Quantitative analysis of floating point arithmetic on FPGA based custom computing machines
crossref: Athanas:1995:PIS
pages: 155--162
year: 1995
DOI: https://doi.org/10.1109/FPGA.1995.477421
bibdate: Sat Oct 9 13:02:18 2010
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2010.10.09 13:02:18 ???
acknowledgement: ack-nhfb
rawauthor: N. Shirazi and A. Walters and P. Athanas
rawtitle: Quantitative analysis of floating point arithmetic on {FPGA} based custom computing machines
abstract:
Many algorithms rely on floating point arithmetic for the dynamic range of representations and require millions of calculations per second. Such computationally intensive algorithms are candidates for acceleration using custom computing machines (CCMs) being tailored for the application. Unfortunately, floating point operators require excessive area (or time) for conventional implementations. Instead, custom formats, derived for individual applications, are feasible on CCMs, and can be implemented on a fraction of a single FPGA. Using higher-level languages, like VHDL, facilitates the development of custom operators without significantly impacting operator performance or area. Properties, including area consumption and speed of working arithmetic operator units used in real-time applications, are discussed

rawabstract:
Many algorithms rely on floating point arithmetic for the dynamic range of representations and require millions of calculations per second. Such computationally intensive algorithms are candidates for acceleration using custom computing machines (CCMs) being tailored for the application. Unfortunately, floating point operators require excessive area (or time) for conventional implementations. Instead, custom formats, derived for individual applications, are feasible on CCMs, and can be implemented on a fraction of a single FPGA. Using higher-level languages, like VHDL, facilitates the development of custom operators without significantly impacting operator performance or area. Properties, including area consumption and speed of working arithmetic operator units used in real-time applications, are discussed

entry:
@InProceedings{Shirazi:1995:QAF,
  author =       "N. Shirazi and A. Walters and P. Athanas",
  title =        "Quantitative analysis of floating point arithmetic on
                 {FPGA} based custom computing machines",
  crossref =     "Athanas:1995:PIS",
  pages =        "155--162",
  year =         "1995",
  DOI =          "https://doi.org/10.1109/FPGA.1995.477421",
  bibdate =      "Sat Oct 9 13:02:18 2010",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "Many algorithms rely on floating point arithmetic for
                 the dynamic range of representations and require
                 millions of calculations per second. Such
                 computationally intensive algorithms are candidates for
                 acceleration using custom computing machines (CCMs)
                 being tailored for the application. Unfortunately,
                 floating point operators require excessive area (or
                 time) for conventional implementations. Instead, custom
                 formats, derived for individual applications, are
                 feasible on CCMs, and can be implemented on a fraction
                 of a single FPGA. Using higher-level languages, like
                 VHDL, facilitates the development of custom operators
                 without significantly impacting operator performance or
                 area. Properties, including area consumption and speed
                 of working arithmetic operator units used in real-time
                 applications, are discussed",
  acknowledgement = ack-nhfb,
}


bibtype: techreport
filename: fparith.bib
label: Sigvartsen:1995:TBF
author: Roy L. Sigvartsen and Roar Skogstrom
title: A test bench for floating point arithmetic
type: FFI rapport
number: 95/04099
institution: Forsvarets forskningsinstitut
address: Kjeller, Norway
pages: 54
year: 1995
bibdate: Thu May 09 08:08:19 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2002.05.09 08:08:19 ???
keywords: floating-point testing
acknowledgement: ack-nhfb
rawauthor: Roy L. Sigvartsen and Roar Skogstr{\o}m
rawtitle: A test bench for floating point arithmetic
entry:
@TechReport{Sigvartsen:1995:TBF,
  author =       "Roy L. Sigvartsen and Roar Skogstr{\o}m",
  title =        "A test bench for floating point arithmetic",
  type =         "{FFI} rapport",
  number =       "95/04099",
  institution =  "Forsvarets forskningsinstitut",
  address =      "Kjeller, Norway",
  pages =        "54",
  year =         "1995",
  bibdate =      "Thu May 09 08:08:19 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "floating-point testing",
}


bibtype: book
filename: fparith.bib
label: Sites:1995:AAA
author: Richard L. Sites and Richard L. Witek
title: Alpha AXP Architecture Reference Manual
publisher: pub-DP
address: pub-DP:adr
edition: Second
pages: various
year: 1995
ISBN: 1-55558-145-5 OR 1555581455
ISBN13: 978-1-55558-145-9 OR 9781555581459
LCCN: QA76.9.A73A46 1995
bibdate: Thu Aug 07 13:41:17 1997
bibtimestamp: 1997.08.07 13:41:17 ???
acknowledgement: ack-nhfb
rawauthor: Richard L. Sites and Richard L. Witek
rawtitle: {Alpha AXP} Architecture Reference Manual
TOC:
Foreword Preface to the First Edition Preface to the Second Edition Part 1: Common Architecture (I) 1. Introduction (I) 1.1 The Alpha AXP Approach to RISC Architecture 1.2 Data Format Overview 1.3 Instruction Format Overview 1.4 Instruction Overview 1.5 Instruction Set Characteristics 1.6 Terminology and Conventions 2. Basic Architecture (I) 2.1 Addressing 2.2 Data Types 2.3 Big-endian Addressing Support 3. Instruction Formats (I) 3.1 Alpha AXP Registers 3.2 Notation 3.3 Instruction Formats 4. Instruction Descriptions (I) 4.1 Instruction Set Overview 4.2 Memory Integer Load/Store Instructions 4.3 Control Instructions 4.4 Integer Arithmetic Instructions 4.5 Logical and Shift Instructions 4.6 Byte-Manipulation Instructions 4.7 Floating-Point Instructions 4.8 Memory Format Floating-Point Instructions 4.9 Branch Format Floating-Point Instructions 4.10 Floating-Point Operate Format Instructions 4.11 Miscellaneous Instructions 4.12 VAX Compatibility Instructions 5. System Architecture and Programming Implications 5.1 Introduction 5.2 Physical Address Space Characteristics 5.3 Translation Buffers and Virtual Caches 5.4 Caches and Write Buffers 5.5 Data Sharing 5.6 Read/Write Ordering 5.7 Arithmetic Traps 6. Common PALcode Architecture (I) 6.1 PALcode 6.2 PALcode Instructions and Functions 6.3 PALcode Environment 6.4 Special Functions Required for PALcode 6.5 PALcode Effects on System Code 6.6 PALcode Replacement 6.7 Required PALcode Instructions 7. Console Subsystem Overview (I) 8. Input/Output Overview (I) Specific Operating System PALcode Architecture (II) Part 2: OpenVMS AXP Software (II-A) 1. Introduction to OpenVMS AXP (II-A) 1.1 Register Usage 2. OpenVMS AXP PALcode Instruction Descriptions (II-A) 2.1 Unprivileged General OpenVMS AXP PALcode Instructions 2.2 OpenVMS AXP Queue Data Types 2.3 Unprivileged OpenVMS AXP Queue PALcode Instructions 2.4 Unprivileged VAX Compatibility PALcode Instructions 2.5 Unprivileged PALcode Thread Instructions 2.6 Privileged PALcode Instructions 3. OpenVMS AXP Memory Management (II-A) 3.1 Introduction 3.2 Virtual Address Space 3.3 Physical Address Space 3.4 Memory Management Control 3.5 Page Table Entries 3.6 Memory Protection 3.7 Address Translation 3.8 Translation Buffer 3.9 Address Space Numbers 3.10 Memory Management Faults 4. OpenVMS AXP Process Structure (II-A) 4.1 Process Definition 4.2 Hardware Privileged Process Context 4.3 Asynchronous System Traps (AST) 4.4 Process Context Switching 5. OpenVMS AXP Internal Processor Registers (II-A) 5.1 Internal Processor Registers 5.2 Stack Pointer Internal Processor Registers 5.3 IPR Summary

rawTOC:
Foreword \\ Preface to the First Edition \\ Preface to the Second Edition \\ Part 1: Common Architecture (I) \\ 1. Introduction (I) \\ 1.1 The Alpha AXP Approach to RISC Architecture \\ 1.2 Data Format Overview \\ 1.3 Instruction Format Overview \\ 1.4 Instruction Overview \\ 1.5 Instruction Set Characteristics \\ 1.6 Terminology and Conventions \\ 2. Basic Architecture (I) \\ 2.1 Addressing \\ 2.2 Data Types \\ 2.3 Big-endian Addressing Support \\ 3. Instruction Formats (I) \\ 3.1 Alpha AXP Registers \\ 3.2 Notation \\ 3.3 Instruction Formats \\ 4. Instruction Descriptions (I) \\ 4.1 Instruction Set Overview \\ 4.2 Memory Integer Load/Store Instructions \\ 4.3 Control Instructions \\ 4.4 Integer Arithmetic Instructions \\ 4.5 Logical and Shift Instructions \\ 4.6 Byte-Manipulation Instructions \\ 4.7 Floating-Point Instructions \\ 4.8 Memory Format Floating-Point Instructions \\ 4.9 Branch Format Floating-Point Instructions \\ 4.10 Floating-Point Operate Format Instructions \\ 4.11 Miscellaneous Instructions \\ 4.12 VAX Compatibility Instructions \\ 5. System Architecture and Programming Implications \\ 5.1 Introduction \\ 5.2 Physical Address Space Characteristics \\ 5.3 Translation Buffers and Virtual Caches \\ 5.4 Caches and Write Buffers \\ 5.5 Data Sharing \\ 5.6 Read/Write Ordering \\ 5.7 Arithmetic Traps \\ 6. Common PALcode Architecture (I) \\ 6.1 PALcode \\ 6.2 PALcode Instructions and Functions \\ 6.3 PALcode Environment \\ 6.4 Special Functions Required for PALcode \\ 6.5 PALcode Effects on System Code \\ 6.6 PALcode Replacement \\ 6.7 Required PALcode Instructions \\ 7. Console Subsystem Overview (I) \\ 8. Input/Output Overview (I) \\ Specific Operating System PALcode Architecture (II) \\ Part 2: OpenVMS AXP Software (II-A) \\ 1. Introduction to OpenVMS AXP (II-A) \\ 1.1 Register Usage \\ 2. OpenVMS AXP PALcode Instruction Descriptions (II-A) \\ 2.1 Unprivileged General OpenVMS AXP PALcode Instructions \\ 2.2 OpenVMS AXP Queue Data Types \\ 2.3 Unprivileged OpenVMS AXP Queue PALcode Instructions \\ 2.4 Unprivileged VAX Compatibility PALcode Instructions \\ 2.5 Unprivileged PALcode Thread Instructions \\ 2.6 Privileged PALcode Instructions \\ 3. OpenVMS AXP Memory Management (II-A) \\ 3.1 Introduction \\ 3.2 Virtual Address Space \\ 3.3 Physical Address Space \\ 3.4 Memory Management Control \\ 3.5 Page Table Entries \\ 3.6 Memory Protection \\ 3.7 Address Translation \\ 3.8 Translation Buffer \\ 3.9 Address Space Numbers \\ 3.10 Memory Management Faults \\ 4. OpenVMS AXP Process Structure (II-A) \\ 4.1 Process Definition \\ 4.2 Hardware Privileged Process Context \\ 4.3 Asynchronous System Traps (AST) \\ 4.4 Process Context Switching \\ 5. OpenVMS AXP Internal Processor Registers (II-A) \\ 5.1 Internal Processor Registers \\ 5.2 Stack Pointer Internal Processor Registers \\ 5.3 IPR Summary

entry:
@Book{Sites:1995:AAA,
  author =       "Richard L. Sites and Richard L. Witek",
  title =        "{Alpha AXP} Architecture Reference Manual",
  publisher =    pub-DP,
  address =      pub-DP:adr,
  edition =      "Second",
  pages =        "various",
  year =         "1995",
  ISBN =         "1-55558-145-5",
  ISBN-13 =      "978-1-55558-145-9",
  LCCN =         "QA76.9.A73A46 1995",
  bibdate =      "Thu Aug 07 13:41:17 1997",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/master.bib;
                 https://www.math.utah.edu/pub/tex/bib/microchip.bib",
  price =        "US\$52.95",
  acknowledgement = ack-nhfb,
  tableofcontents = "Foreword \\
                 Preface to the First Edition \\
                 Preface to the Second Edition \\
                 Part 1: Common Architecture (I) \\
                 1. Introduction (I) \\
                 1.1 The Alpha AXP Approach to RISC Architecture \\
                 1.2 Data Format Overview \\
                 1.3 Instruction Format Overview \\
                 1.4 Instruction Overview \\
                 1.5 Instruction Set Characteristics \\
                 1.6 Terminology and Conventions \\
                 2. Basic Architecture (I) \\
                 2.1 Addressing \\
                 2.2 Data Types \\
                 2.3 Big-endian Addressing Support \\
                 3. Instruction Formats (I) \\
                 3.1 Alpha AXP Registers \\
                 3.2 Notation \\
                 3.3 Instruction Formats \\
                 4. Instruction Descriptions (I) \\
                 4.1 Instruction Set Overview \\
                 4.2 Memory Integer Load/Store Instructions \\
                 4.3 Control Instructions \\
                 4.4 Integer Arithmetic Instructions \\
                 4.5 Logical and Shift Instructions \\
                 4.6 Byte-Manipulation Instructions \\
                 4.7 Floating-Point Instructions \\
                 4.8 Memory Format Floating-Point Instructions \\
                 4.9 Branch Format Floating-Point Instructions \\
                 4.10 Floating-Point Operate Format Instructions \\
                 4.11 Miscellaneous Instructions \\
                 4.12 VAX Compatibility Instructions \\
                 5. System Architecture and Programming Implications \\
                 5.1 Introduction \\
                 5.2 Physical Address Space Characteristics \\
                 5.3 Translation Buffers and Virtual Caches \\
                 5.4 Caches and Write Buffers \\
                 5.5 Data Sharing \\
                 5.6 Read/Write Ordering \\
                 5.7 Arithmetic Traps \\
                 6. Common PALcode Architecture (I) \\
                 6.1 PALcode \\
                 6.2 PALcode Instructions and Functions \\
                 6.3 PALcode Environment \\
                 6.4 Special Functions Required for PALcode \\
                 6.5 PALcode Effects on System Code \\
                 6.6 PALcode Replacement \\
                 6.7 Required PALcode Instructions \\
                 7. Console Subsystem Overview (I) \\
                 8. Input/Output Overview (I) \\
                 Specific Operating System PALcode Architecture (II) \\
                 Part 2: OpenVMS AXP Software (II-A) \\
                 1. Introduction to OpenVMS AXP (II-A) \\
                 1.1 Register Usage \\
                 2. OpenVMS AXP PALcode Instruction Descriptions (II-A)
                 \\
                 2.1 Unprivileged General OpenVMS AXP PALcode
                 Instructions \\
                 2.2 OpenVMS AXP Queue Data Types \\
                 2.3 Unprivileged OpenVMS AXP Queue PALcode Instructions
                 \\
                 2.4 Unprivileged VAX Compatibility PALcode Instructions
                 \\
                 2.5 Unprivileged PALcode Thread Instructions \\
                 2.6 Privileged PALcode Instructions \\
                 3. OpenVMS AXP Memory Management (II-A) \\
                 3.1 Introduction \\
                 3.2 Virtual Address Space \\
                 3.3 Physical Address Space \\
                 3.4 Memory Management Control \\
                 3.5 Page Table Entries \\
                 3.6 Memory Protection \\
                 3.7 Address Translation \\
                 3.8 Translation Buffer \\
                 3.9 Address Space Numbers \\
                 3.10 Memory Management Faults \\
                 4. OpenVMS AXP Process Structure (II-A) \\
                 4.1 Process Definition \\
                 4.2 Hardware Privileged Process Context \\
                 4.3 Asynchronous System Traps (AST) \\
                 4.4 Process Context Switching \\
                 5. OpenVMS AXP Internal Processor Registers (II-A) \\
                 5.1 Internal Processor Registers \\
                 5.2 Stack Pointer Internal Processor Registers \\
                 5.3 IPR Summary",
}


bibtype: article
filename: fparith.bib
label: Siu:1995:TMP
author: Kai-Yeung Y. Siu and V. Roychowdhury and T. Kailath
title: Toward Massively Parallel Design of Multipliers
journal: j-J-PAR-DIST-COMP
volume: 24
number: 1
pages: 86--93
month: jan
monthnumber: 1
year: 1995
CODEN: JPDCER
DOI: https://doi.org/10.1006/jpdc.1995.1008
ISSN: 0743-7315 (print), 1096-0848 (electronic) OR 07437315 (print), 10960848 (electronic)
ISSNL: 0743-7315 OR 07437315
bibdate: Thu Mar 9 09:18:56 MST 2000
bibtimestamp: 2000.03.09 09:18:56 MST
fjournal: Journal of Parallel and Distributed Computing
acknowledgement: ack-nhfb
corpsource: Department of Electr. and Comput. Eng., California University, Irvine, CA, USA
journalURL: http://www.sciencedirect.com/science/journal/07437315
treatment: T Theoretical or Mathematical
rawauthor: Kai-Yeung Y. Siu and V. Roychowdhury and T. Kailath
rawtitle: Toward Massively Parallel Design of Multipliers
URL:
http://www.idealibrary.com/links/doi/10.1006/jpdc.1995.1008/production; http://www.idealibrary.com/links/doi/10.1006/jpdc.1995.1008/production/pdf

keywords:
AND-OR circuits; arithmetic computation; asymptotic time complexity; circuits; computation delays; computational complexity; digital arithmetic; fan-in threshold circuits; gates; hardware; logic; massively parallel design; massively parallel high-speed multipliers; multiplication; multipliers; multiplying; parallel processing; parity; polynomial; speed; symmetric functions; threshold; threshold elements; unbounded fan-in/fan-out; VLSI technology

entry:
@Article{Siu:1995:TMP,
  author =       "Kai-Yeung Y. Siu and V. Roychowdhury and T. Kailath",
  title =        "Toward Massively Parallel Design of Multipliers",
  journal =      j-J-PAR-DIST-COMP,
  volume =       "24",
  number =       "1",
  pages =        "86--93",
  month =        jan,
  year =         "1995",
  CODEN =        "JPDCER",
  DOI =          "https://doi.org/10.1006/jpdc.1995.1008",
  ISSN =         "0743-7315 (print), 1096-0848 (electronic)",
  ISSN-L =       "0743-7315",
  bibdate =      "Thu Mar 9 09:18:56 MST 2000",
  bibsource =    "http://www.idealibrary.com/servlet/useragent?func=showAllIssues&curIssueID=jpdc;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.idealibrary.com/links/doi/10.1006/jpdc.1995.1008/production;
                 http://www.idealibrary.com/links/doi/10.1006/jpdc.1995.1008/production/pdf",
  acknowledgement = ack-nhfb,
  classification = "C4210 (Formal logic); C4240C (Computational
                 complexity); C5110 (Logic elements); C5120 (Logic and
                 switching circuits); C5220P (Parallel architecture);
                 C5230 (Digital arithmetic methods)",
  corpsource =   "Department of Electr. and Comput. Eng., California
                 University, Irvine, CA, USA",
  fjournal =     "Journal of Parallel and Distributed Computing",
  journal-URL =  "http://www.sciencedirect.com/science/journal/07437315",
  keywords =     "AND-OR circuits; arithmetic computation; asymptotic
                 time complexity; circuits; computation delays;
                 computational complexity; digital arithmetic; fan-in
                 threshold circuits; gates; hardware; logic; massively
                 parallel design; massively parallel high-speed
                 multipliers; multiplication; multipliers; multiplying;
                 parallel processing; parity; polynomial; speed;
                 symmetric functions; threshold; threshold elements;
                 unbounded fan-in/fan-out; VLSI technology",
  treatment =    "T Theoretical or Mathematical",
}


bibtype: article
filename: fparith.bib
label: Sleijpen:1995:MCP
author: Gerard L. G. Sleijpen and Henk A. van der Vorst
title: Maintaining convergence properties of BiCGstab methods in finite precision arithmetic
journal: j-NUMER-ALGORITHMS
volume: 10
number: 3--4
pages: 203--223
month: oct
monthnumber: 10
year: 1995
CODEN: NUALEG
ISSN: 1017-1398 (print), 1572-9265 (electronic) OR 10171398 (print), 15729265 (electronic)
ISSNL: 1017-1398 OR 10171398
MRclass: 65F10 (65Y20)
MRnumber: MR1355732 (96g:65037)
bibdate: Sat Dec 31 06:28:14 2005
bibtimestamp: 2005.12.31 06:28:14 ???
fjournal: Numerical Algorithms
acknowledgement: ack-nhfb
corpsource: Math. Inst., Utrecht University, Netherlands
journalURL: http://link.springer.com/journal/11075
treatment: T Theoretical or Mathematical
rawauthor: G{\`e}rard L. G. Sleijpen and Henk A. van der Vorst
rawtitle: Maintaining convergence properties of {BiCGstab} methods in finite precision arithmetic
bibsource:
http://www.math.psu.edu/dna/contents/na.html; https://www.math.utah.edu/pub/bibnet/authors/v/vandervorst-henk-a.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/numeralgorithms.bib; MathSciNet database

keywords:
Bi-CG coefficient accuracy; Bi-CG iteration coefficients; Bi-CG process; BiCGstab methods; computational complexity; conjugate gradient methods; convergence of numerical methods; convergence property maintenance; convergence speed; finite precision arithmetic; hybrid methods; matrix algebra; rounding errors; roundoff errors

entry:
@Article{Sleijpen:1995:MCP,
  author =       "G{\`e}rard L. G. Sleijpen and Henk A. van der Vorst",
  title =        "Maintaining convergence properties of {BiCGstab}
                 methods in finite precision arithmetic",
  journal =      j-NUMER-ALGORITHMS,
  volume =       "10",
  number =       "3--4",
  pages =        "203--223",
  month =        oct,
  year =         "1995",
  CODEN =        "NUALEG",
  ISSN =         "1017-1398 (print), 1572-9265 (electronic)",
  ISSN-L =       "1017-1398",
  MRclass =      "65F10 (65Y20)",
  MRnumber =     "MR1355732 (96g:65037)",
  bibdate =      "Sat Dec 31 06:28:14 2005",
  bibsource =    "http://www.math.psu.edu/dna/contents/na.html;
                 https://www.math.utah.edu/pub/bibnet/authors/v/vandervorst-henk-a.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/numeralgorithms.bib;
                 MathSciNet database",
  acknowledgement = ack-nhfb,
  classification = "B0290F (Interpolation and function approximation);
                 B0290H (Linear algebra); C4130 (Interpolation and
                 function approximation); C4140 (Linear algebra); C4240C
                 (Computational complexity)",
  corpsource =   "Math. Inst., Utrecht University, Netherlands",
  fjournal =     "Numerical Algorithms",
  journal-URL =  "http://link.springer.com/journal/11075",
  keywords =     "Bi-CG coefficient accuracy; Bi-CG iteration
                 coefficients; Bi-CG process; BiCGstab methods;
                 computational complexity; conjugate gradient methods;
                 convergence of numerical methods; convergence property
                 maintenance; convergence speed; finite precision
                 arithmetic; hybrid methods; matrix algebra; rounding
                 errors; roundoff errors",
  pubcountry =   "Switzerland",
  treatment =    "T Theoretical or Mathematical",
}


bibtype: article
filename: fparith.bib
label: Smith:1995:CFA
author: Roger Alan Smith
title: A Continued-Fraction Analysis of Trigonometric Argument Reduction
journal: j-IEEE-TRANS-COMPUT
volume: 44
number: 11
pages: 1348--1351
month: nov
monthnumber: 11
year: 1995
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.475133
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Fri Dec 08 10:21:28 2006
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2006.12.08 10:21:28 ???
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: Roger Alan Smith
rawtitle: A Continued-Fraction Analysis of Trigonometric Argument Reduction
abstract:
The calculation of a trigonometric function of a large argument x is effectively carried out by finding the integer $N$ and $ 0 leq alpha < 1 $ such that $ x = (N + alpha ) pi / 4 $. This reduction modulo $ pi / 4 $ makes it possible to calculate a trigonometric function of a reduced argument, either $ alpha pi / 4 $ or $ (1 - alpha ) pi / 4 $, which lies in the interval $ (0, pi / 4) $. Payne and Hanek [1] described an efficient algorithm for computing $ alpha $ to a predetermined level of accuracy. They noted that if $x$ differs only slightly from an integral multiple $ pi / 2 $, the reduction must be carried out quite accurately to avoid loss of significance in the reduced argument. We present a simple method using continued fractions for determining, for all numbers $x$ for which the greatest number of insignificant leading bits occur. Applications are made IEEE single-precision and double-precision formats and two extended- precision formats.

keywords:
argument reduction; computer arithmetic; continued fractions; nonlinear optimization; Payne/Hanek radian reduction; range reduction; trigonometric functions

rawabstract:
The calculation of a trigonometric function of a large argument x is effectively carried out by finding the integer $N$ and $ 0 \leq \alpha < 1 $ such that $ x = (N + \alpha) \pi / 4 $. This reduction modulo $ \pi / 4 $ makes it possible to calculate a trigonometric function of a reduced argument, either $ \alpha \pi / 4 $ or $ (1 - \alpha) \pi / 4 $, which lies in the interval $ (0, \pi / 4) $. Payne and Hanek [1] described an efficient algorithm for computing $ \alpha $ to a predetermined level of accuracy. They noted that if $x$ differs only slightly from an integral multiple $ \pi / 2 $, the reduction must be carried out quite accurately to avoid loss of significance in the reduced argument. We present a simple method using continued fractions for determining, for all numbers $x$ for which the greatest number of insignificant leading bits occur. Applications are made IEEE single-precision and double-precision formats and two extended- precision formats.

entry:
@Article{Smith:1995:CFA,
  author =       "Roger Alan Smith",
  title =        "A Continued-Fraction Analysis of Trigonometric
                 Argument Reduction",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "44",
  number =       "11",
  pages =        "1348--1351",
  month =        nov,
  year =         "1995",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.475133",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Fri Dec 08 10:21:28 2006",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "The calculation of a trigonometric function of a large
                 argument x is effectively carried out by finding the
                 integer $N$ and $ 0 \leq \alpha < 1 $ such that $ x =
                 (N + \alpha) \pi / 4 $. This reduction modulo $ \pi / 4
                 $ makes it possible to calculate a trigonometric
                 function of a reduced argument, either $ \alpha \pi / 4
                 $ or $ (1 - \alpha) \pi / 4 $, which lies in the
                 interval $ (0, \pi / 4) $. Payne and Hanek [1]
                 described an efficient algorithm for computing $ \alpha
                 $ to a predetermined level of accuracy. They noted that
                 if $x$ differs only slightly from an integral multiple
                 $ \pi / 2 $, the reduction must be carried out quite
                 accurately to avoid loss of significance in the reduced
                 argument. We present a simple method using continued
                 fractions for determining, for all numbers $x$ for
                 which the greatest number of insignificant leading bits
                 occur. Applications are made IEEE single-precision and
                 double-precision formats and two extended- precision
                 formats.",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
  keywords =     "argument reduction; computer arithmetic; continued
                 fractions; nonlinear optimization; Payne/Hanek radian
                 reduction; range reduction; trigonometric functions",
}


bibtype: article
filename: fparith.bib
label: Smith:1995:FTC
author: J. C. Smith and F. J. Taylor
title: A fault-tolerant CEQRNS processing element for linear systolic array DSP applications
journal: j-IEEE-TRANS-COMPUT
volume: 44
number: 9
pages: 1121--1130
month: sep
monthnumber: 9
year: 1995
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.464390
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Wed Jul 6 08:01:29 MDT 2011
bibtimestamp: 2011.07.06 08:01:29 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=464390
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: J. C. Smith and F. J. Taylor
rawtitle: A fault-tolerant {CEQRNS} processing element for linear systolic array {DSP} applications
entry:
@Article{Smith:1995:FTC,
  author =       "J. C. Smith and F. J. Taylor",
  title =        "A fault-tolerant {CEQRNS} processing element for
                 linear systolic array {DSP} applications",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "44",
  number =       "9",
  pages =        "1121--1130",
  month =        sep,
  year =         "1995",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.464390",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Wed Jul 6 08:01:29 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=464390",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: inproceedings
filename: fparith.bib
label: Soderquist:1995:APC
author: Peter Soderquist and Miriam Leeser
crossref: Knowles:1995:PSC
pages: 132--139
month: jul
monthnumber: 7
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Soderquist.pdf
keywords: ARITH-12
acknowledgement: ack-sfo
rawauthor: Peter Soderquist and Miriam Leeser
title:
An Area / Performance Comparison of Subtractive and Multiplicative Divide / Square Root Implementations

rawtitle:
An Area\slash Performance Comparison of Subtractive and Multiplicative Divide\slash Square Root Implementations

entry:
@InProceedings{Soderquist:1995:APC,
  author =       "Peter Soderquist and Miriam Leeser",
  title =        "An Area\slash Performance Comparison of Subtractive
                 and Multiplicative Divide\slash Square Root
                 Implementations",
  crossref =     "Knowles:1995:PSC",
  pages =        "132--139",
  month =        jul,
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Soderquist.pdf",
  acknowledgement = ack-sfo # " and " # ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: phdthesis
filename: fparith.bib
label: Song:1995:RCT
author: Gi-Yong Song
title: Robust checksum test in algorithm-based fault tolerance on 2-D processor arrays
type: Thesis (Ph.D.)
school: University of Southwestern Louisiana
address: Lafayette, LA, USA
pages: 95
year: 1995
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
acknowledgement: ack-nhfb
rawauthor: Gi-Yong Song
rawtitle: Robust checksum test in algorithm-based fault tolerance on {2-D} processor arrays
keywords:
error-correcting codes (information theory); fault-tolerant computing; floating-point arithmetic; floating-point testing

entry:
@PhdThesis{Song:1995:RCT,
  author =       "Gi-Yong Song",
  title =        "Robust checksum test in algorithm-based fault
                 tolerance on {2-D} processor arrays",
  type =         "Thesis ({Ph.D.})",
  school =       "University of Southwestern Louisiana",
  address =      "Lafayette, LA, USA",
  pages =        "95",
  year =         "1995",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "error-correcting codes (information theory);
                 fault-tolerant computing; floating-point arithmetic;
                 floating-point testing",
}


bibtype: article
filename: fparith.bib
label: Srinivas:1995:FRD
author: H. R. Srinivas and K. K. Parhi
title: A fast radix-4 division algorithm and its architecture
journal: j-IEEE-TRANS-COMPUT
volume: 44
number: 6
pages: 826--831
month: jun
monthnumber: 6
year: 1995
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.391179
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Wed Jul 6 08:01:28 MDT 2011
bibtimestamp: 2011.07.06 08:01:28 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=391179
fjournal: IEEE Transactions on Computers
acknowledgement: ack-sfo
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: H. R. Srinivas and K. K. Parhi
rawtitle: A fast radix-4 division algorithm and its architecture
entry:
@Article{Srinivas:1995:FRD,
  author =       "H. R. Srinivas and K. K. Parhi",
  title =        "A fast radix-4 division algorithm and its
                 architecture",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "44",
  number =       "6",
  pages =        "826--831",
  month =        jun,
  year =         "1995",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.391179",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Wed Jul 6 08:01:28 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=391179",
  acknowledgement = ack-sfo # " and " # ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: article
filename: fparith.bib
label: Tatsaki:1995:ICB
author: A. Tatsaki and T. Stouraitis and C. Goutis
title: Image coder based on residue number system for progressive transmission
journal: j-ELECT-LETTERS
volume: 31
number: 6
pages: 442--443
month: mar
monthnumber: 3
year: 1995
CODEN: ELLEAK
DOI: https://doi.org/10.1109/12.403714
ISSN: 0013-5194 (print), 1350-911X (electronic) OR 00135194 (print), 1350911X (electronic)
ISSNL: 0013-5194 OR 00135194
bibdate: Fri Nov 9 11:38:58 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:58 MST
URL: http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=8573
fjournal: Electronics Letters
keywords: residue arithmetic; residue number system
acknowledgement: ack-nhfb
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=2220
rawauthor: A. Tatsaki and T. Stouraitis and C. Goutis
rawtitle: Image coder based on residue number system for progressive transmission
entry:
@Article{Tatsaki:1995:ICB,
  author =       "A. Tatsaki and T. Stouraitis and C. Goutis",
  title =        "Image coder based on residue number system for
                 progressive transmission",
  journal =      j-ELECT-LETTERS,
  volume =       "31",
  number =       "6",
  pages =        "442--443",
  month =        mar,
  year =         "1995",
  CODEN =        "ELLEAK",
  DOI =          "https://doi.org/10.1109/12.403714",
  ISSN =         "0013-5194 (print), 1350-911X (electronic)",
  ISSN-L =       "0013-5194",
  bibdate =      "Fri Nov 9 11:38:58 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=8573",
  acknowledgement = ack-nhfb,
  fjournal =     "Electronics Letters",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=2220",
  keywords =     "residue arithmetic; residue number system",
  summary =      "A computationally efficient algorithm for image
                 compression and progressive transmission is presented.
                 A prime-factor discrete cosine transform (DCT) is
                 applied, where the coefficients are computed in three
                 groups and are residue represented by a \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Thimbleby:1995:NCW
author: Harold Thimbleby
title: A New Calculator and Why it is Necessary
journal: j-COMP-J
volume: 38
number: 6
pages: 418--433
year: 1995
CODEN: CMPJA6
DOI: https://doi.org/10.1093/comjnl/38.6.418
ISSN: 0010-4620 (print), 1460-2067 (electronic) OR 00104620 (print), 14602067 (electronic)
ISSNL: 0010-4620 OR 00104620
bibdate: Tue Dec 4 14:48:45 MST 2012
bibtimestamp: 2012.12.04 14:48:45 MST
fjournal: The Computer Journal
acknowledgement: ack-nhfb
classcodes: C5430 (Microcomputers); C6180 (User interfaces)
corpsource: Department of Computer Science, Middlesex University, London, UK
journalURL: http://comjnl.oxfordjournals.org/
treatment: P Practical
rawauthor: Harold Thimbleby
rawtitle: A New Calculator and Why it is Necessary
bibsource:
http://comjnl.oxfordjournals.org/content/38/6.toc; http://www3.oup.co.uk/computer_journal/Volume_38/Issue_06/Vol38_06.index.html; https://www.math.utah.edu/pub/tex/bib/compj1990.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib

URL:
http://comjnl.oxfordjournals.org/content/38/6/418.full.pdf+html; http://www3.oup.co.uk/computer_journal/Volume_38/Issue_06/Vol38_06.body.html#AbstractThimbleby

keywords:
conventional calculators; declarative design; declarative system; design issues; electronic calculators; interactive system; user interfaces

entry:
@Article{Thimbleby:1995:NCW,
  author =       "Harold Thimbleby",
  title =        "A New Calculator and Why it is Necessary",
  journal =      j-COMP-J,
  volume =       "38",
  number =       "6",
  pages =        "418--433",
  month =        "????",
  year =         "1995",
  CODEN =        "CMPJA6",
  DOI =          "https://doi.org/10.1093/comjnl/38.6.418",
  ISSN =         "0010-4620 (print), 1460-2067 (electronic)",
  ISSN-L =       "0010-4620",
  bibdate =      "Tue Dec 4 14:48:45 MST 2012",
  bibsource =    "http://comjnl.oxfordjournals.org/content/38/6.toc;
                 http://www3.oup.co.uk/computer_journal/Volume_38/Issue_06/Vol38_06.index.html;
                 https://www.math.utah.edu/pub/tex/bib/compj1990.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://comjnl.oxfordjournals.org/content/38/6/418.full.pdf+html;
                 http://www3.oup.co.uk/computer_journal/Volume_38/Issue_06/Vol38_06.body.html#AbstractThimbleby",
  acknowledgement = ack-nhfb,
  classcodes =   "C5430 (Microcomputers); C6180 (User interfaces)",
  corpsource =   "Department of Computer Science, Middlesex University,
                 London, UK",
  email-1 =      "haro1d@mdx.ac.UK",
  fjournal =     "The Computer Journal",
  journal-URL =  "http://comjnl.oxfordjournals.org/",
  keywords =     "conventional calculators; declarative design;
                 declarative system; design issues; electronic
                 calculators; interactive system; user interfaces",
  treatment =    "P Practical",
}


bibtype: article
filename: fparith.bib
label: Thomas:1995:IFC
author: Jim Thomas and Jerome T. Coonen
title: An Introduction to Floating-Point C Extensions
journal: j-CCCUJ
volume: 13
number: 1
pages: 49--??
month: jan
monthnumber: 1
year: 1995
CODEN: CCUJEX
ISSN: 1075-2838 OR 10752838
bibdate: Fri Aug 30 16:52:23 MDT 1996
bibsource: http://www.cuj.com/cbklist.htm; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.08.30 16:52:23 MDT
fjournal: C/C++ Users Journal
acknowledgement: ack-nhfb
rawauthor: Jim Thomas and Jerome T. Coonen
rawtitle: An Introduction to Floating-Point {C} Extensions
entry:
@Article{Thomas:1995:IFC,
  author =       "Jim Thomas and Jerome T. Coonen",
  title =        "An Introduction to Floating-Point {C} Extensions",
  journal =      j-CCCUJ,
  volume =       "13",
  number =       "1",
  pages =        "49--??",
  month =        jan,
  year =         "1995",
  CODEN =        "CCUJEX",
  ISSN =         "1075-2838",
  bibdate =      "Fri Aug 30 16:52:23 MDT 1996",
  bibsource =    "http://www.cuj.com/cbklist.htm;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "C/C++ Users Journal",
}


bibtype: inproceedings
filename: fparith.bib
label: Tsuji:1995:ASF
author: K. Tsuji
title: An Algorithm for Sum of Floating-Point Numbers without Round-Off Error
crossref: Bainov:1995:PTI
pages: 181--190
year: 1995
bibdate: Sat Jun 02 08:14:13 2001
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2001.06.02 08:14:13 ???
keywords: accurate floating-point summation
acknowledgement: ack-nhfb
rawauthor: K. Tsuji
rawtitle: An Algorithm for Sum of Floating-Point Numbers without Round-Off Error
entry:
@InProceedings{Tsuji:1995:ASF,
  author =       "K. Tsuji",
  title =        "An Algorithm for Sum of Floating-Point Numbers without
                 Round-Off Error",
  crossref =     "Bainov:1995:PTI",
  pages =        "181--190",
  year =         "1995",
  bibdate =      "Sat Jun 02 08:14:13 2001",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "accurate floating-point summation",
}


bibtype: techreport
filename: fparith.bib
label: Turner:1995:PSI
author: P. R. Turner Daniel W. Lozier
title: Parallel and Serial Implementations of SLI Arithmetic
type: Internal report
number: NISTIT-5660
institution: National Institute of Standards and Technology
address: Gaithersburg, MD, USA
pages: 181--190
day: 1
month: jun
monthnumber: 6
year: 1995
bibdate: Tue Nov 05 15:29:02 2019
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2019.11.05 15:29:02 ???
acknowledgement: ack-nhfb
rawauthor: P. R. Turner Daniel W. Lozier
rawtitle: Parallel and Serial Implementations of {SLI} Arithmetic
entry:
@TechReport{Turner:1995:PSI,
  author =       "P. R. Turner Daniel W. Lozier",
  title =        "Parallel and Serial Implementations of {SLI}
                 Arithmetic",
  type =         "Internal report",
  number =       "NISTIT-5660",
  institution =  "National Institute of Standards and Technology",
  address =      "Gaithersburg, MD, USA",
  day =          "1",
  month =        jun,
  year =         "1995",
  bibdate =      "Tue Nov 05 15:29:02 2019",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
}


bibtype: misc
filename: fparith.bib
label: Ueda:1995:DMA
author: T. Ueda
title: Decimal Multiplying Assembly and Multiply Module
pages: 181--190
month: jan
monthnumber: 1
year: 1995
bibdate: Fri Jun 24 20:43:45 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.06.24 20:43:45 ???
keywords: decimal floating-point arithmetic
acknowledgement: ack-nhfb
howpublished: U.S. Patent number 5,379,245.
rawauthor: T. Ueda
rawtitle: Decimal Multiplying Assembly and Multiply Module
entry:
@Misc{Ueda:1995:DMA,
  author =       "T. Ueda",
  title =        "Decimal Multiplying Assembly and Multiply Module",
  howpublished = "U.S. Patent number 5,379,245.",
  month =        jan,
  year =         "1995",
  bibdate =      "Fri Jun 24 20:43:45 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "decimal floating-point arithmetic",
}


bibtype: inproceedings
filename: fparith.bib
label: VanDrunen:1995:ARA
author: R. VanDrunen and L. Spaanenburg and P. Lucassen and J. A. G. Nijhuis
title: Arithmetic for Relative Accuracy
crossref: Knowles:1995:PSC
pages: 208--209, 239--250
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_vanDrunen.pdf
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: R. VanDrunen and L. Spaanenburg and P. Lucassen and J. A. G. Nijhuis
rawtitle: Arithmetic for Relative Accuracy
entry:
@InProceedings{VanDrunen:1995:ARA,
  author =       "R. VanDrunen and L. Spaanenburg and P. Lucassen and J.
                 A. G. Nijhuis",
  title =        "Arithmetic for Relative Accuracy",
  crossref =     "Knowles:1995:PSC",
  pages =        "208--209, 239--250",
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_vanDrunen.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: article
filename: fparith.bib
label: Vinnakota:1995:IMS
author: B. Vinnakota
title: Implementing multiplication with split read-only memory
journal: j-IEEE-TRANS-COMPUT
volume: 44
number: 11
pages: 1352--1356
month: nov
monthnumber: 11
year: 1995
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.475134
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Wed Jul 6 08:01:30 MDT 2011
bibtimestamp: 2011.07.06 08:01:30 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=475134
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: B. Vinnakota
rawtitle: Implementing multiplication with split read-only memory
entry:
@Article{Vinnakota:1995:IMS,
  author =       "B. Vinnakota",
  title =        "Implementing multiplication with split read-only
                 memory",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "44",
  number =       "11",
  pages =        "1352--1356",
  month =        nov,
  year =         "1995",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.475134",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Wed Jul 6 08:01:30 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=475134",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: article
filename: fparith.bib
label: Wang:1995:NDT
author: Zhongde Wang and G. A. Jullien and W. C. Miller
title: A new design technique for column compression multipliers
journal: j-IEEE-TRANS-COMPUT
volume: 44
number: 8
pages: 962--970
month: aug
monthnumber: 8
year: 1995
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.403712
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Wed Jul 6 08:01:29 MDT 2011
bibtimestamp: 2011.07.06 08:01:29 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=403712
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: Zhongde Wang and G. A. Jullien and W. C. Miller
rawtitle: A new design technique for column compression multipliers
entry:
@Article{Wang:1995:NDT,
  author =       "Zhongde Wang and G. A. Jullien and W. C. Miller",
  title =        "A new design technique for column compression
                 multipliers",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "44",
  number =       "8",
  pages =        "962--970",
  month =        aug,
  year =         "1995",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.403712",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Wed Jul 6 08:01:29 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=403712",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: inproceedings
filename: fparith.bib
label: Wei:1995:CNM
author: Belle W. Y. Wei and He Du and Honglu Chen
title: A Complex-Number Multiplier Using Radix-$4$ Digits
crossref: Knowles:1995:PSC
pages: 84--90
year: 1995
bibdate: Mon May 20 06:05:24 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:05:24 MDT
URL: http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Wei.pdf
keywords: ARITH-12
acknowledgement: ack-nhfb
rawauthor: Belle W. Y. Wei and He Du and Honglu Chen
rawtitle: A Complex-Number Multiplier Using Radix-$4$ Digits
entry:
@InProceedings{Wei:1995:CNM,
  author =       "Belle W. Y. Wei and He Du and Honglu Chen",
  title =        "A Complex-Number Multiplier Using Radix-$4$ Digits",
  crossref =     "Knowles:1995:PSC",
  pages =        "84--90",
  year =         "1995",
  bibdate =      "Mon May 20 06:05:24 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  URL =          "http://www.acsel-lab.com/arithmetic/arith12/papers/ARITH12_Wei.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-12",
}


bibtype: article
filename: fparith.bib
label: Williams:1995:SBA
author: T. Williams and N. Patkar and G. Shen
title: SPARC64: a 64-b 64-active-instruction out-of-order-execution MCM processor
journal: j-IEEE-J-SOLID-STATE-CIRCUITS
volume: 30
number: 11
pages: 1215--1226
month: nov
monthnumber: 11
year: 1995
CODEN: IJSCBC
ISSN: 0018-9200 (print), 1558-173X (electronic) OR 00189200 (print), 1558173X (electronic)
ISSNL: 0018-9200 OR 00189200
bibdate: Thu Apr 2 08:38:35 1998
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1998.04.02 08:38:35 ???
fjournal: IEEE Journal of Solid-State Circuits
acknowledgement: ack-sfo
rawauthor: T. Williams and N. Patkar and G. Shen
rawtitle: {SPARC64}: a 64-b 64-active-instruction out-of-order-execution {MCM} processor
entry:
@Article{Williams:1995:SBA,
  author =       "T. Williams and N. Patkar and G. Shen",
  title =        "{SPARC64}: a 64-b 64-active-instruction
                 out-of-order-execution {MCM} processor",
  journal =      j-IEEE-J-SOLID-STATE-CIRCUITS,
  volume =       "30",
  number =       "11",
  pages =        "1215--1226",
  month =        nov,
  year =         "1995",
  CODEN =        "IJSCBC",
  ISSN =         "0018-9200 (print), 1558-173X (electronic)",
  ISSN-L =       "0018-9200",
  bibdate =      "Thu Apr 2 08:38:35 1998",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-sfo # " and " # ack-nhfb,
  fjournal =     "IEEE Journal of Solid-State Circuits",
}


bibtype: article
filename: fparith.bib
label: Wong:1995:FEE
author: W. F. Wong and E. Goto
title: Fast evaluation of the elementary functions in single precision
journal: j-IEEE-TRANS-COMPUT
volume: 44
number: 3
pages: 453--457
month: mar
monthnumber: 3
year: 1995
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.372037
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Thu Dec 14 11:25:18 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.14 11:25:18 MST
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
affiliation: Department of Inf. Syst. and Computer Science, Nat. University of Singapore, Singapore
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
thesaurus: Error analysis; Floating point arithmetic
rawauthor: W. F. Wong and E. Goto
rawtitle: Fast evaluation of the elementary functions in single precision
abstract:
In this paper we introduce a new method for the fast evaluation of the elementary functions in single precision based on the evaluation of truncated Taylor series using a difference method. We assume the availability of large and fast (at least for read purposes) memory. We call this method the ATA (Add-Table lookup-Add) method. As the name implies, the hardware required for the method are adders (both two/ and multi/operand adders) and fast tables. For IEEE single precision numbers our initial estimates indicate that we can calculate the basic elementary functions, namely reciprocal, square root, logarithm, exponential, trigonometric and inverse trigonometric functions, within the latency of two to four floating point multiplies.

keywords:
Adders; Difference method; Elementary functions; Fast evaluation; Floating point multiplies; Inverse trigonometric functions; Logarithm functions; Reciprocal; Single precision; Square root; Truncated Taylor series

rawabstract:
In this paper we introduce a new method for the fast evaluation of the elementary functions in single precision based on the evaluation of truncated Taylor series using a difference method. We assume the availability of large and fast (at least for read purposes) memory. We call this method the ATA (Add-Table lookup-Add) method. As the name implies, the hardware required for the method are adders (both two/ and multi/operand adders) and fast tables. For IEEE single precision numbers our initial estimates indicate that we can calculate the basic elementary functions, namely reciprocal, square root, logarithm, exponential, trigonometric and inverse trigonometric functions, within the latency of two to four floating point multiplies.

entry:
@Article{Wong:1995:FEE,
  author =       "W. F. Wong and E. Goto",
  title =        "Fast evaluation of the elementary functions in single
                 precision",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "44",
  number =       "3",
  pages =        "453--457",
  month =        mar,
  year =         "1995",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.372037",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Thu Dec 14 11:25:18 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "In this paper we introduce a new method for the fast
                 evaluation of the elementary functions in single
                 precision based on the evaluation of truncated Taylor
                 series using a difference method. We assume the
                 availability of large and fast (at least for read
                 purposes) memory. We call this method the ATA
                 (Add-Table lookup-Add) method. As the name implies, the
                 hardware required for the method are adders (both two/
                 and multi/operand adders) and fast tables. For IEEE
                 single precision numbers our initial estimates indicate
                 that we can calculate the basic elementary functions,
                 namely reciprocal, square root, logarithm, exponential,
                 trigonometric and inverse trigonometric functions,
                 within the latency of two to four floating point
                 multiplies.",
  acknowledgement = ack-nhfb,
  affiliation =  "Department of Inf. Syst. and Computer Science, Nat.
                 University of Singapore, Singapore",
  ajournal =     "IEEE Trans. Comput.",
  classification = "C4110 (Error analysis in numerical methods); C5230
                 (Digital arithmetic methods)",
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
  keywords =     "Adders; Difference method; Elementary functions; Fast
                 evaluation; Floating point multiplies; Inverse
                 trigonometric functions; Logarithm functions;
                 Reciprocal; Single precision; Square root; Truncated
                 Taylor series",
  thesaurus =    "Error analysis; Floating point arithmetic",
}


bibtype: article
filename: fparith.bib
label: Wu:1995:SRM
author: Youfeng Wu
title: Strength Reduction of Multiplications by Integer Constants
journal: j-SIGPLAN
volume: 30
number: 2
pages: 42--48
month: feb
monthnumber: 2
year: 1995
CODEN: SINODQ
ISSN: 0362-1340 (print), 1523-2867 (print), 1558-1160 OR 03621340 (print), 15232867 (print), 15581160
ISSNL: 0362-1340 OR 03621340
bibdate: Sun Dec 14 09:17:00 MST 2003
bibsource: http://portal.acm.org/; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.12.14 09:17:00 MST
fjournal: ACM SIGPLAN Notices
acknowledgement: ack-nhfb
journalURL: http://portal.acm.org/browse_dl.cfm?idx=J706
rawauthor: Youfeng Wu
rawtitle: Strength Reduction of Multiplications by Integer Constants
entry:
@Article{Wu:1995:SRM,
  author =       "Youfeng Wu",
  title =        "Strength Reduction of Multiplications by Integer
                 Constants",
  journal =      j-SIGPLAN,
  volume =       "30",
  number =       "2",
  pages =        "42--48",
  month =        feb,
  year =         "1995",
  CODEN =        "SINODQ",
  ISSN =         "0362-1340 (print), 1523-2867 (print), 1558-1160
                 (electronic)",
  ISSN-L =       "0362-1340",
  bibdate =      "Sun Dec 14 09:17:00 MST 2003",
  bibsource =    "http://portal.acm.org/;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "ACM SIGPLAN Notices",
  journal-URL =  "http://portal.acm.org/browse_dl.cfm?idx=J706",
}


bibtype: article
filename: fparith.bib
label: Ypma:1995:HDN
author: Tjalling J. Ypma
title: Historical Development of the Newton--Raphson Method
journal: j-SIAM-REVIEW
volume: 37
number: 4
pages: 531--551
month: dec
monthnumber: 12
year: 1995
CODEN: SIREAD
DOI: https://doi.org/10.1137/1037125
ISSN: 0036-1445 (print), 1095-7200 (electronic) OR 00361445 (print), 10957200 (electronic)
ISSNL: 0036-1445 OR 00361445
MRclass: 01A05 (65-03)
MRnumber: 97b:01003
MRreviewer: M. Z. Nashed
bibdate: Sat Mar 29 09:55:35 MDT 2014
bibtimestamp: 2014.03.29 09:55:35 MDT
URL: http://epubs.siam.org/23425.htm; http://link.aip.org/link/?SIR/37/531/1
fjournal: SIAM Review
acknowledgement: ack-nhfb
affiliation: Western Washington Univ
affiliationaddress: Bellingham, WA, USA
journalURL: http://epubs.siam.org/sirev
journalabr: SIAM Rev
onlinedate: December 1995
rawauthor: Tjalling J. Ypma
rawtitle: Historical Development of the {Newton--Raphson} Method
bibsource:
Compendex database; http://epubs.siam.org/toc/siread/37/4; http://www.siam.org/journals/sirev/sirev374.htm; https://www.math.utah.edu/pub/tex/bib/elefunt.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/siamreview.bib

abstract:
This expository paper traces the development of the Newton--Raphson method for solving nonlinear algebraic equations through the extant notes, letters, and publications of Isaac Newton, Joseph Raphson, and Thomas Simpson. It is shown how Newton's formulation differed from the iterative process of Raphson, and that Simpson was the first to give a general formulation, in terms of fluxional calculus, applicable to nonpolynomial equations. Simpson's extension of the method to systems of equations is exhibited.

keywords:
Algebra; Algorithms; Approximation theory; Differentiation (calculus); Finite difference method; Fluxional calculus; Isaac Newton; Iterative methods; Joseph Raphson; Linearization; Newton--Raphson method; Nonlinear algebraic equations; Nonlinear equations; Nonpolynomial equation; Polynomials; Secant method; Thomas Simpson

rawabstract:
This expository paper traces the development of the Newton--Raphson method for solving nonlinear algebraic equations through the extant notes, letters, and publications of Isaac Newton, Joseph Raphson, and Thomas Simpson. It is shown how Newton's formulation differed from the iterative process of Raphson, and that Simpson was the first to give a general formulation, in terms of fluxional calculus, applicable to nonpolynomial equations. Simpson's extension of the method to systems of equations is exhibited.

entry:
@Article{Ypma:1995:HDN,
  author =       "Tjalling J. Ypma",
  title =        "Historical Development of the {Newton--Raphson}
                 Method",
  journal =      j-SIAM-REVIEW,
  volume =       "37",
  number =       "4",
  pages =        "531--551",
  month =        dec,
  year =         "1995",
  CODEN =        "SIREAD",
  DOI =          "https://doi.org/10.1137/1037125",
  ISSN =         "0036-1445 (print), 1095-7200 (electronic)",
  ISSN-L =       "0036-1445",
  MRclass =      "01A05 (65-03)",
  MRnumber =     "97b:01003",
  MRreviewer =   "M. Z. Nashed",
  bibdate =      "Sat Mar 29 09:55:35 MDT 2014",
  bibsource =    "Compendex database;
                 http://epubs.siam.org/toc/siread/37/4;
                 http://www.siam.org/journals/sirev/sirev374.htm;
                 https://www.math.utah.edu/pub/tex/bib/elefunt.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/siamreview.bib",
  URL =          "http://epubs.siam.org/23425.htm;
                 http://link.aip.org/link/?SIR/37/531/1",
  abstract =     "This expository paper traces the development of the
                 Newton--Raphson method for solving nonlinear algebraic
                 equations through the extant notes, letters, and
                 publications of Isaac Newton, Joseph Raphson, and
                 Thomas Simpson. It is shown how Newton's formulation
                 differed from the iterative process of Raphson, and
                 that Simpson was the first to give a general
                 formulation, in terms of fluxional calculus, applicable
                 to nonpolynomial equations. Simpson's extension of the
                 method to systems of equations is exhibited.",
  acknowledgement = ack-nhfb,
  affiliation =  "Western Washington Univ",
  affiliationaddress = "Bellingham, WA, USA",
  classification = "921.1; 921.2; 921.6",
  fjournal =     "SIAM Review",
  journal-URL =  "http://epubs.siam.org/sirev",
  journalabr =   "SIAM Rev",
  keywords =     "Algebra; Algorithms; Approximation theory;
                 Differentiation (calculus); Finite difference method;
                 Fluxional calculus; Isaac Newton; Iterative methods;
                 Joseph Raphson; Linearization; Newton--Raphson method;
                 Nonlinear algebraic equations; Nonlinear equations;
                 Nonpolynomial equation; Polynomials; Secant method;
                 Thomas Simpson",
  onlinedate =   "December 1995",
}


